CS5155GD16 CHERRY [Cherry Semiconductor Corporation], CS5155GD16 Datasheet - Page 7

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CS5155GD16

Manufacturer Part Number
CS5155GD16
Description
CPU 5-Bit Synchronous Buck Controller
Manufacturer
CHERRY [Cherry Semiconductor Corporation]
Datasheet

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When regulator output voltage achieves the 1V level pre-
sent at the COMP pin, regulation has been achieved and
normal off time will ensue. The PWM comparator termi-
nates the switch on time, with off time set by the C
capacitor. The V
cycle as required to ensure the regulator output voltage
tracks the output of the error amplifier.
The soft start and COMP capacitors will charge to their
final levels, providing a controlled turn on of the regulator
output. Regulator turn on time is determined by the COMP
capacitor charging to its final value. Its voltage is limited
by the soft start COMP clamp and the voltage on the soft
start pin (see Figures 2 and 3).
Figure 2: CS5155 demonstration board startup in response to increasing
12V and 5V input voltages. Extended off time is followed by normal off
time operation when output voltage achieves regulation to the error
amplifier output.
Figure 3: CS5155 demonstration board startup waveforms.
If the input voltage rises quickly, or the regulator output is
enabled externally, output voltage will increase to the level
set by the error amplifier output more rapidly, usually
within a couple of cycles (see Figure 4).
Trace 1 - Regulator Output Voltage (1V/div.)
Trace 3 - COMP Pin (error amplifier output) (1V/div.)
Trace 4 - Soft Start Pin (2V/div.)
Trace 1 - Regulator Output Voltage (1V/div.)
Trace 2 - Inductor Switching Node (2V/div.)
Trace 3 - 12V input (V
Trace 4 - 5V Input (1V/div.)
2
ª control loop will adjust switch duty
CC1
and V
CC2
) (5V/div.)
Applications Information: continued
OFF
7
Figure 4: CS5155 demonstration board enable startup waveforms.
Normal Operation
During normal operation, switch off time is constant and
set by the C
V
changes in regulator switching frequency, duty cycle, and
output ripple in response to changes in load and line.
Output voltage ripple will be determined by inductor rip-
ple current working into the ESR of the output capacitors
(see Figures 5 and 6).
Figure 5: Peak-to-peak ripple on V
2
ª control loop to maintain regulation. This results in
Trace 1 - Regulator Output Voltage (10V/div.)
Trace 2 - Inductor Switching Node (5V/div.)
Trace 1 - Regulator Output Voltage (5V/div.)
Trace 2 - Inductor Switching Node (5V/div.)
OFF
capacitor. Switch on time is adjusted by the
OUT
= 2.8V, I
OUT
= 0.5A (light load).

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