HI5628/16IN INTERSIL [Intersil Corporation], HI5628/16IN Datasheet

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HI5628/16IN

Manufacturer Part Number
HI5628/16IN
Description
8-Bit, 165/125/60MSPS, Dual High Speed CMOS D/A Converter
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.HI562816IN.pdf (10 pages)
8-Bit, 165/125/60MSPS, Dual High Speed
CMOS D/A Converter
The HI5628 is an 8-bit, dual 125MSPS D/A converter which
is implemented in an advanced CMOS process. Operating
from a single +5V to +3V supply, the converter provides
20.48mA of full scale output current and includes an input
data register. Low glitch energy and excellent frequency
domain performance are achieved using a segmented
architecture. The single DAC version is the HI5660 while
10-bit versions exist in the HI5760 and HI5728. This DAC is
a member of the CommLink™ family of communication
devices.
Ordering Information
†
Pinout
HI5628/16IN
HI5628IN
HI5628/6IN
HI5628EVAL1
Contact factory for availability.
NUMBER
PART
†
†
-40 to 85 48 Ld LQFP
-40 to 85 48 Ld LQFP
-40 to 85 48 Ld LQFP
RANGE
TEMP.
(
o
25
C)
Evaluation Platform
PACKAGE
ID0 (LSB)
1
SLEEP
DGND
DGND
DGND
DV
AV
NC
ID4
ID3
ID2
ID1
DD
DD
Data Sheet
Q48.7x7A 165MHz
Q48.7x7A 125MHz
Q48.7x7A 60MHz
PKG. NO.
10
11
12
1
2
3
4
5
6
7
8
9
13 14 15 16
48
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
125MHz
CLOCK
47
SPEED
MAX
46
45
HI5628 (LQFP)
44
17
43
18
42
19
41
20
Features
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . 125MSPS
• Low Power . . . . . . . . . . . . . . 330mW at 5V, 170mW at 3V
• Integral Linearity Error . . . . . . . . . . . . . . . . . . . 0.25 LSB
• Differential Linearity . . . . . . . . . . . . . . . . . . . . . 0.25 LSB
• Channel Isolation (Typ). . . . . . . . . . . . . . . . . . . . . . . 80dB
• SFDR to Nyquist at 10MHz Output . . . . . . . . . . . . 60dBc
• Internal 1.2V Bandgap Voltage Reference
• Single Power Supply from +5V to +3V
• CMOS Compatible Inputs
• Excellent Spurious Free Dynamic Range
Applications
• Direct Digital Frequency Synthesis
• Wireless Communications
• Signal Reconstruction
• Arbitrary Waveform Generators
• Test Equipment
• High Resolution Imaging Systems
40
1-888-INTERSIL or 321-724-7143
21
22
39
23
38
37
24
36
35
34
33
32
31
30
29
28
27
26
25
July 1999
CommLink™ is a trademark of Intersil Corporation.
QD4
QD3
QD2
QD1
QD0 (LSB)
DGND
DGND
DV
DGND
NC
AV
AGND
DD
DD
|
Copyright
File Number
©
Intersil Corporation 1999
HI5628
4520.3

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HI5628/16IN Summary of contents

Page 1

... HI5760 and HI5728. This DAC is a member of the CommLink™ family of communication devices. Ordering Information TEMP. PART RANGE o NUMBER ( C) PACKAGE † HI5628/16IN - LQFP HI5628IN - LQFP HI5628/6IN - LQFP † HI5628EVAL1 25 Evaluation Platform † Contact factory for availability. Pinout ...

Page 2

Typical Applications Circuit 50 ID4 ID3 ID2 ID1 ID0 (LSB) SLEEP 0.1 F FERRITE +5V TO +3V POWER SUPPLY BEAD NOTE: Recommended seperate analog and digital ...

Page 3

Functional Block Diagram (LSB) ID0 ID1 ID2 ID3 LATCH ID4 ID5 ID6 (MSB) ID7 ICLK INT/EXT INT/EXT VOLTAGE REFERENCE REFERENCE SELECT REFLO REFIO FSADJ SLEEP (LSB) QD0 QD1 QD2 QD3 LATCH QD4 QD5 QD6 (MSB) QD7 QCLK AV AGND DV ...

Page 4

Absolute Maximum Ratings Digital Supply Voltage DV to DCOM . . . . . . . . . . . . . . . . . +5.5V DD Analog Supply Voltage AV to ACOM . . . . . . ...

Page 5

... Electrical Specifications per channel except for ‘Power Supply Characteristics.’ (Continued) PARAMETER AC CHARACTERISTICS - HI5628/16IN - 165MHz (Per Channel) Spurious Free Dynamic Range, SFDR Within a Window Total Harmonic Distortion (THD) to Nyquist Spurious Free Dynamic Range, SFDR to Nyquist AC CHARACTERISTICS - HI5628IN - 125MHz (Per Channel) ...

Page 6

Electrical Specifications per channel except for ‘Power Supply Characteristics.’ (Continued) PARAMETER Reference Input Multiplying Bandwidth DIGITAL INPUTS D7-D0, CLK (Per Channel) Input Logic High Voltage with 5V Supply Input Logic High Voltage with 3V Supply, ...

Page 7

Timing Diagrams CLK D7-D0 I OUT t SETT t PD FIGURE 1. OUTPUT SETTLING TIME DIAGRAM CLK t SU D7-D0 I OUT t PD FIGURE 3. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM Definition of Specifications ...

Page 8

This also aids the ability to resolve the specified error band without overdriving the oscilloscope. Singlet Glitch Area, is the switching transient appearing on the output during a code ...

Page 9

Noise Reduction To minimize power supply noise, 0.1 F capacitors should be placed as close as possible to the converter’s power supply pins, AV and DV . Also, should the layout be designed DD DD using separate digital and analog ...

Page 10

Pin Descriptions PIN NO. PIN NAME 39-32 QD7 (MSB) Through QD0 (LSB) 1-5, 48-46 ID7 (MSB) Through ID0 (LSB) 8 SLEEP 15 REFLO 23 REFIO 22 FSADJ 14, 24 ICOMP1, QCOMP1 13, 18, 19, 25 AGND 17 IOUTB 16 IOUTA ...

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