PCA9542PWDH PHILIPS [NXP Semiconductors], PCA9542PWDH Datasheet - Page 5
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PCA9542PWDH
Manufacturer Part Number
PCA9542PWDH
Description
2-channel I2C multiplexer and interrupt controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.PCA9542PWDH.pdf
(10 pages)
Philips Semiconductors
CHARACTERISTICS OF THE I
The I
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see FIgure 1).
1999 Oct 07
2-channel I
SDA
SCL
SDA
SCL
2
C-bus is for 2-way, 2-line communication between different ICs
TRANSMITTER/
RECEIVER
MASTER
data valid
2
data line
Figure 1. Bit transfer
stable;
C multiplexer and interrupt controller
SDA
SCL
change
START condition
allowed
of data
RECEIVER
SLAVE
2
S
C-BUS
Figure 2. Definition of start and stop conditions
Figure 3. System configuration
TRANSMITTER/
RECEIVER
SW00363
SLAVE
5
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 2).
System configuration
A device generating a message is a transmitter: a device receiving
is the receiver. The device that controls the message is the master
and the devices which are controlled by the master are the slaves
(see Figure 3).
TRANSMITTER
MASTER
STOP condition
TRANSMITTER/
RECEIVER
MASTER
P
SLAVE
SW00365
SDA
SCL
MULTIPLEXER
I
2
C
Product specification
PCA9542
SW00366