PCA9632DP1 NXP [NXP Semiconductors], PCA9632DP1 Datasheet

PCA9632DP1

Manufacturer Part Number

PCA9632DP1

Description

4-bit Fm+ I2C-bus low power LED driver

Manufacturer

NXP [NXP Semiconductors]

Datasheet

1.PCA9632DP1.pdf (38 pages)

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1. General description

The PCA9632 is an I

Red/Green/Blue/Amber (RGBA) color mixing applications. The PCA9632 is a drop-in

upgrade for the PCA9633 with 40 power reduction. In Individual brightness control mode,

each LED output has its own 8-bit resolution (256 steps) ﬁxed frequency Individual PWM

controller that operates at 1.5625 kHz with a duty cycle that is adjustable from 0 % to

99.6 % to allow the LED to be set to a speciﬁc brightness value. In group dimming mode,

each LED output has its own 6-bit resolution (64 steps) ﬁxed frequency Individual PWM

controller that operates at 6.25 kHz with a duty cycle that is adjustable from 0 % to 98.4 %

to allow the LED to be set to a speciﬁc brightness value. A ﬁfth 4-bit resolution (16 steps)

Group PWM controller has a ﬁxed frequency of 190 Hz that is used to dim all the LEDs

with the same value.

While operating in the Blink mode, each LED output has its own 8-bit resolution

(256 steps) ﬁxed frequency Individual PWM controller that operates at 1.5625 kHz with a

duty cycle that is adjustable from 0 % to 99.6 % to allow the LED to be set to a speciﬁc

brightness value. Blink rate is controlled by the Group frequency setting that has 8-bit

resolution (256 steps). The blink rate is adjustable between 24 Hz and once every

10.73 seconds. For Group frequency settings between 6 Hz and 24 Hz, the Group PWM

has a 6-bit resolution (64 steps) with a duty cycle that is adjustable from 0 % to 98.4 %.

For Group frequency settings between 6 Hz and 0.09 Hz (once in 10.73 seconds), the

Group PWM has an 8-bit resolution (256 steps) with a duty cycle that is adjustable from

0 % to 99.6 %.

Each LED output can be off, on (no PWM control), set at its Individual PWM controller

value or at both Individual and Group PWM controller values. The LED output driver is

programmed to be either open-drain with a 25 mA current sink capability at 5 V or

totem pole with a 25 mA sink, 10 mA source capability at 5 V. The PCA9632 operates with

a supply voltage range of 2.3 V to 5.5 V and the outputs are 5.5 V tolerant. LEDs can be

directly connected to the LED output (up to 25 mA, 5.5 V) or controlled with external

drivers and a minimum amount of discrete components for larger current or higher voltage

LEDs.

The PCA9632 is in the new Fast-mode Plus (Fm+) family. Fm+ devices offer higher

frequency (up to 1 MHz) and more densely populated bus operation (up to 4000 pF).

Software programmable LED Group and three Sub Call I

deﬁned groups of PCA9632 devices to respond to a common I

for example, all red LEDs to be turned on or off at the same time or marquee chasing

effect, thus minimizing I

PCA9632

4-bit Fm+ I

Rev. 03 — 15 July 2008

C-bus low power LED driver

C-bus controlled 4-bit LED driver optimized for

C-bus commands.

C-bus addresses allow all or

C-bus address, allowing

Product data sheet

Related parts for PCA9632DP1

PCA9632DP1 Summary of contents

Page 1

PCA9632 4-bit Fm+ I Rev. 03 — 15 July 2008 1. General description The PCA9632 Red/Green/Blue/Amber (RGBA) color mixing applications. The PCA9632 is a drop-in upgrade for the PCA9633 with 40 power reduction. In Individual brightness control ...

Page 2

NXP Semiconductors The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9632 through the I their default state causing the outputs to be set high-impedance. This allows an easy and quick way to reconﬁgure all ...

Page 3

... I LED status information I LED displays I LCD backlights I Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside mark PCA9632DP1 9632 PCA9632DP2 9632 PCA9632TK 9632 PCA9632TK2 9632 PCA9632_3 Product data sheet Package Name Description TSSOP8 plastic thin shrink small outline package; 8 leads; ...

Page 4

NXP Semiconductors 5. Block diagram PCA9632 SCL INPUT FILTER SDA POWER- RESET V SS REGISTER X BRIGHTNESS CONTROL 6.25 kHz/ 1.56 kHz 400 kHz OSCILLATOR Fig 1. Block diagram of PCA9632 PCA9632_3 Product data sheet 10-pin version A0 ...

Page 5

... PCB in the thermal pad region. PCA9632_3 Product data sheet 1 8 LED0 V DD LED1 2 7 SDA PCA9632DP1 3 6 LED2 SCL 4 5 LED3 V SS 002aad040 Pin conﬁguration for TSSOP8 LED0 ...

Page 6

NXP Semiconductors Table 3. Symbol LED0 LED1 LED2 LED3 SCL SDA V DD [1] HVSON10 package die supply ground is connected to both the and board-level performance, the exposed pad needs to be ...

Page 7

NXP Semiconductors • slave devices that are designed to respond to the General Call address (0000 000) • High-speed mode (Hs-mode) master code (0000 1XX) a. 8-pin version Fig 6. The last bit of the address byte deﬁnes the operation ...

Page 8

NXP Semiconductors 7.1.4 Software reset I The address shown in performed by the master. The Software Reset address (SWRST Call) must be used with R R the PCA9632 does not acknowledge the SWRST. See “Software ...

Page 9

NXP Semiconductors Table 4. AI2 Remark: Other combinations not shown in reserved and must not be used for proper device operation. AI[2:0] = 000 is used when the same register must be accessed several times ...

Page 10

NXP Semiconductors 7.3 Register deﬁnitions Table 5. Register summary Only D[3:0] = 0000 to 1100 are allowed and will be acknowledged. D[3:0] = 1101, 1110, or 1111 are reserved and will not be acknowledged. When writing to the Control register, ...

Page 11

NXP Semiconductors 7.3.1 Mode register 1, MODE1 Table 6. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access 7 AI2 read only 6 AI1 read only 5 AI0 read only 4 SLEEP R/W ...

Page 12

NXP Semiconductors 7.3.3 PWM registers PWMx — Individual brightness control registers Table 8. Legend: * default value. Address 02h 03h 04h 05h While operating in Individual brightness mode (LDRx = 10), a 1.5625 kHz ﬁxed frequency signal ...

Page 13

NXP Semiconductors 7.3.4 Group duty cycle control, GRPPWM Table 9. Legend: * default value. Address 06h When DMBLNK bit (MODE2 register) is programmed with 0, a 190 Hz ﬁxed frequency signal is superimposed with the 6.25 kHz Individual brightness control ...

Page 14

NXP Semiconductors 7.3.5 Group frequency, GRPFREQ Table 10. Legend: * default value. Address 07h GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2 register) is equal to logic 1. Value in this register is a ‘don’t ...

Page 15

NXP Semiconductors Once subaddresses have been programmed to their right values, SUBx bits need to be set order to have the device acknowledging these addresses (MODE1 register). Only the 7 MSBs representing the I register is a ...

Page 16

NXP Semiconductors 4. Once the SWRST Call address has been sent and acknowledged, the master sends 2 bytes with 2 speciﬁc values (SWRST data byte 1 and byte 2): a. Byte 1 = A5h: the PCA9632 acknowledges this value only. ...

Page 17

NXP Semiconductors Table 15. Output transistors based on LEDOUT registers, INVRT and OUTDRV bits LEDOUT INVRT OUTDRV Upper transistor LED driver off LED driver ...

Page 18

NXP Semiconductors brightness control signal (LEDn) Minimum pulse width for LEDn brightness control is 2.5 s. Fig 9. Individual LED brightness control signals ...

Page 19

NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...

Page 20

NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 13. System conﬁguration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...

Page 21

NXP Semiconductors 9. Bus transactions slave address START condition (1) 10-pin version only. (2) See Table 5 for register deﬁnition. Fig 15. Write to a speciﬁc register (1) slave address S ...

Page 22

NXP Semiconductors (1) slave address START condition R/W acknowledge from slave PWM2 register (cont.) A acknowledge from slave (1) 10-pin version only. Fig 17. Multiple writes to Individual brightness registers ...

Page 23

NXP Semiconductors slave address sequence ( START condition LED All Call I sequence ( START condition (1) 10-pin version is used for this ﬁgure. Four PCA9632DP2 or PCA9632TK2 and same sequence (A) ...

Page 24

NXP Semiconductors 10. Application design-in information C-BUS/SMBus MASTER Fig 21. Typical application Question 1: What kind of edge rate control is there on the outputs? • The typical edge rates depend on the output conﬁguration, supply ...

Page 25

NXP Semiconductors Question 5: I’m using LEDs with integrated Zener diodes and the IC is getting very hot. Why? • The IC outputs can be set to either open-drain or push-pull and default to push-pull outputs. In this application with ...

Page 26

NXP Semiconductors 12. Static characteristics Table 18. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on ...

Page 27

NXP Semiconductors 13. Dynamic characteristics Table 19. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) START HD;STA condition t set-up time for a repeated ...

Page 28

NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 22. Deﬁnition of timing START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 23. I ...

Page 29

NXP Semiconductors 15. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT ...

Page 30

NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are ...

Page 31

NXP Semiconductors TSSOP10: plastic thin shrink small outline package; 10 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 ...

Page 32

NXP Semiconductors HVSON10: plastic thermal enhanced very thin small outline package; no leads; 10 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the ...

Page 33

NXP Semiconductors 16. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 17. Soldering of SMD packages This text provides a ...

Page 34

NXP Semiconductors • Process issues, such as application of adhesive and ﬂux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath speciﬁcations, including temperature and impurities ...

Page 35

NXP Semiconductors Fig 29. Temperature proﬁles for large and small components For further information on temperature proﬁles, refer to Application Note AN10365 “Surface mount reﬂow soldering description” . 18. Abbreviations Table 22. Acronym CDM DUT ESD HBM 2 I C-bus ...

Page 36

NXP Semiconductors 19. Revision history Table 23. Revision history Document ID Release date PCA9632_3 20080715 • Modiﬁcations: Section 7.1.1 “Regular I • Table 5 “Register • Figure 20 “Software Reset (SWRST) Call – changed “Byte 1 = 0xA5” to “Byte ...

Page 37

NXP Semiconductors 20. Legal information 20.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualiﬁcation Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

Page 38

NXP Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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