ADV7340EBZ AD [Analog Devices], ADV7340EBZ Datasheet - Page 34
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ADV7340EBZ
Manufacturer Part Number
ADV7340EBZ
Description
Manufacturer
AD [Analog Devices]
Datasheet
1.ADV7340EBZ.pdf
(88 pages)
- Current page: 34 of 88
- Download datasheet (2Mb)
ADV7340/ADV7341
Table 20. Register 0x34 to Register 0x35
SR7 to
SR0
0x34
0x35
1
2
Used in conjunction with ED/HD sync in Subaddress 0x02, Bit 7, set to 1.
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
Register
ED/HD Mode
Register 5
ED/HD Mode
Register 6
Bit Description
ED/HD Timing Reset.
ED/HD HSYNC Control.
ED/HD VSYNC Control.
ED/HD Blank Polarity.
ED Macrovision Enable.
Reserved.
ED/HD VSYNC/Field Input.
Horizontal/Vertical Counters.
Reserved.
ED/HD RGB Input Enable.
ED/HD Sync on PrPb.
ED/HD Color DAC Swap.
ED/HD Gamma Correction
Curve Select.
ED/HD Gamma Correction
Enable.
ED/HD Adaptive Filter Mode.
ED/HD Adaptive Filter Enable.
1
1
2
7
0
1
0
1
Rev. 0 | Page 34 of 88
6
0
1
0
1
5
0
0
1
Bit Number
4
0
1
0
1
3
0
1
0
1
2
0
1
0
1
1
0
1
0
1
0
0
1
0
Register Setting
Internal ED/HD timing counters enabled.
Resets the internal ED/HD timing counters.
HSYNC output control.
VSYNC output control.
P_BLANK active high.
P_BLANK active low.
Macrovision disabled.
Macrovision enabled.
0 must be written to this bit.
0 = field input.
1 = VSYNC input.
Update field/line counter.
Field/line counter free running.
Disabled.
Enabled.
Disabled.
Enabled.
DAC 2 = Pb, DAC 3 = Pr.
DAC 2 = Pr, DAC 3 = Pb.
Gamma Correction Curve A.
Gamma Correction Curve B.
Disabled.
Enabled.
Mode A.
Mode B.
Disabled.
Enabled.
Reset
Value
0x48
0x00
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