ADV7441ABSTZ-110 AD [Analog Devices], ADV7441ABSTZ-110 Datasheet - Page 16

• Manufacturer Part Number: ADV7441ABSTZ-110
• Description: 10-Bit Integrated, Multiformat SDTV/HDTV Video Decoder, RGB Graphics Digitizer, and 2:1 Multiplexed HDMI/DVI Interface
• Manufacturer: AD [Analog Devices]

ADV7441A
THEORY OF OPERATION
ANALOG FRONT END
The ADV7441A analog front end comprises four 10-bit ADCs
that digitize the analog video signal before applying it to the SDP or
CP. The analog front end uses differential channels connected to
each ADC to ensure high performance in mixed-signal appli-
cations.
The analog front end also includes a 12-channel input mux that
enables multiple video signals to be applied to the ADV7441A.
Current and voltage clamps are positioned in front of each ADC
to ensure that the video signal remains within the range of the
converter. Fine clamping of the video signals is performed
downstream by digital fine clamping in either the CP or SDP.
The ADCs are configured to run in 4× oversampling mode
when decoding composite and S-Video inputs. For component
525i, 625i, 525p, and 625p sources, 2× oversampling is performed,
but 4× oversampling is available for component 525i and 625i.
All other video standards are 1× oversampled. Oversampling
the video signals reduces the cost and complexity of external
antialiasing (AA) filters with the benefit of an increased signal-
to-noise ratio (SNR).
The ADV7441A supports simultaneous processing of CVBS and
RGB standard definition signals to enable SCART compatibility
and overlay functionality. A combination of CVBS and RGB inputs
can be mixed and output, as controlled by the I
the FB pin.
HDMI RECEIVER
The HDMI receiver on the ADV7441A incorporates active
equalization of the HDMI data signals. This equalization compen-
sates for the high frequency losses inherent in HDMI and DVI
cables, especially those with long lengths and high frequencies.
It is capable of equalizing for cable lengths up to 30 meters and,
therefore, can achieve robust receiver performance at even
the highest HDMI data rates.
With the inclusion of HDCP, displays can receive encrypted
video content. The HDMI interface of the ADV7441A allows
for authentication of a video receiver, decryption of encoded
data at the receiver, and renewability of that authentication
during transmission as specified by the HDCP 1.3 protocol.
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The HDMI receiver also offers advanced audio functionality.
The receiver contains an audio mute controller that can detect
a variety of selectable conditions that may result in audible
extraneous noise in the audio output. Upon detection of these
conditions, the audio data can be ramped to prevent audio
clicks and pops.
STANDARD DEFINITION PROCESSOR
The SDP section is capable of decoding a large selection of
baseband video signals in composite, S-Video, and YUV
formats. The video standards supported by the SDP include
PAL (B/D/I/G/H/60/M/N/Nc), NTSC (M/J/4.43), and SECAM
(B/D/G/K/L). The ADV7441A automatically detects the video
standard and processes it accordingly. The SDP has a 5-line,
superadaptive, 2D comb filter that provides superior chrominance
and luminance separation when decoding a composite video signal.
This highly adaptive filter automatically adjusts its processing
mode according to the video standard and signal quality
without requiring user intervention. The SDP has an IF filter
block that compensates for attenuation in the high frequency
luma spectrum due to a tuner SAW filter.
The SDP has specific luminance and chrominance parameter
control for brightness, contrast, saturation, and hue.
The ADV7441A implements the patented ADLLT algorithm
to track varying video line lengths from sources such as VCRs.
ADLLT enables the ADV7441A to track and decode poor
quality video sources, such as VCRs, and noisy sources, such
as tuner outputs, VCD players, and camcorders. The SDP also
contains a CTI processor. This processor increases the edge rate
on chroma transitions, resulting in a sharper video image.
The SDP can process a variety of VBI data services, such as
teletext, closed captioning (CC), wide-screen signaling (WSS), a
video programming system (VPS), vertical interval time codes
(VITC), a copy generation management system (CGMS), and
an extended data service (XDS). The ADV7441A SDP section has
a Macrovision 7.1 detection circuit that allows it to detect Type I,
Type II, and Type III protection levels. The decoder is fully robust
to all Macrovision signal inputs.