X9C102_06 INTERSIL [Intersil Corporation], X9C102_06 Datasheet - Page 2
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X9C102_06
Manufacturer Part Number
X9C102_06
Description
Digitally Controlled Potentiometer
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.X9C102_06.pdf
(11 pages)
PIN CONFIGURATION
ORDERING INFORMATION
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "T1" suffix for tape and reel.
**Add "T2" suffix for tape and reel.
X9C102P
X9C102PZ (Note)
X9C102PI
X9C102PIZ (Note)
X9C102S*
X9C102SZ* (Note)
X9C102SI*
X9C102SIZ*
X9C103P
X9C103PZ (Note)
X9C103PI
X9C103PIZ (Note)
X9C103S*
X9C103SZ*
X9C103SI*
X9C103SIZ*
X9C503P
X9C503PZ (Note)
X9C503PI
X9C503PIZ (Note)
X9C503S*
X9C503SZ* (Note)
X9C503SI*
X9C503SIZ*
X9C104P
X9C104PI
X9C104PIZ (Note)
X9C104S*
X9C104SZ*
X9C104SI*
X9C104SIZ*
PART NUMBER
,
,
,
,
,
,
,
**
**
**
,
,
**
**
**
**
,
,
,
,
** (Note)
** (Note)
** (Note)
** (Note)
** (Note)
** (Note)
X9C102P
X9C102P Z
X9C102P I
X9C102P ZI
X9C102S
X9C102S Z
X9C102S I
X9C102S ZI
X9C103P
X9C103P Z
X9C103P I
X9C103P ZI
X9C103S
X9C103S Z
X9C103S I
X9C103S ZI
X9C503P
X9C503P Z
X9C503P I
X9C503P ZI
X9C503S
X9C503S Z
X9C503S I
X9C503S ZI
X9C104P
X9C104P I
X9C104P ZI
X9C104S
X9C104S Z
X9C104S I
X9C104S ZI
PART MARKING
2
V
X9C102, X9C103, X9C104, X9C503
H
V
INC
U/D
/R
SS
H
R
TOTAL
(kΩ)
100
10
50
1
1
2
3
4
X9C102/103/104/503
TEMPERATURE RANGE
DIP/SOIC
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
(°C)
8
7
6
5
V
CS
V
V
CC
L
W
/R
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld PDIP
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
/R
L
W
PACKAGE
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0031
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
PKG. DWG. #
December 20, 2006
FN8222.1