DAC1201D125HL NXP [NXP Semiconductors], DAC1201D125HL Datasheet - Page 15

• Manufacturer Part Number: DAC1201D125HL
• Description: Dual 12-bit DAC, up to 125 Msps
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
DAC1201D125_1
Product data sheet
10.2.1 Dual-port mode
Table 6.
The data and clock circuit for Dual-port mode operation is shown in
Each DAC has its own independent data and clock inputs. The data enters the input latch
on the rising edge of the WRTA/WRTB signal and is transferred to the DAC latch. The
output is updated on the rising edge of the CLKA/CLKB signal.
Mode Function
LOW
HIGH Dual-port mode
Fig 14. Dual-port mode operation
Fig 15. Dual-port mode timing
Interleaved mode
IOUTAP, IOUTAN/
IOUTBP, IOUTBN
Mode selection
DA11 to DA0/
DB11 to DB0
WRTA/
WRTB
CLKA/
CLKB
Rev. 01 — 27 November 2008
DA11 to DA0 DB11 to DB0
active
active
DB11 to DB0
DA11 to DA0
N 2
WRTB
WRTA
CLKA
CLKB
N
12
12
off
active
N 1
INPUT A
INPUT B
LATCH
LATCH
N+1
12
12
N
Pin 17
IQWRT
WRTA
Dual 12-bit DAC, up to 125 Msps
LATCH
LATCH
DAC A
DAC B
001aai977
N+2
DAC1201D125
N+1
Pin 18 Pin 19
IQCLK IQRESET
CLKA
Figure
N+3
CLKB
© NXP B.V. 2008. All rights reserved.
001aaj115
N+2
14.
Pin 20
IQSEL
WRTB
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