DAC1208D650HN NXP [NXP Semiconductors], DAC1208D650HN Datasheet - Page 16

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DAC1208D650HN

Manufacturer Part Number
DAC1208D650HN
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
DAC1208D650
Product data sheet
Each DAC device of the system generates its own reference (ref_A in
If configured as a slave, an early-late comparator compares the internal reference with the
external reference provided by the MDS pins. The comparator controls an internal buffer
that is used to delay the samples.
Fig 7.
Multi-Device Synchronization (MDS) implementation
All information provided in this document is subject to legal disclaimers.
SYNC~
LANES
Rev. 2 — 14 December 2010
2×, 4× or 8× interpolating DAC with JESD204A interface
DIG
ref_A
BUFFER
COMP
MGMT
CLK
CK
mds_A_out
mds_A
Q
I
DAC
DAC1208D650
001aal073
MDS_A
Figure
© NXP B.V. 2010. All rights reserved.
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