SAA7199BWP PHILIPS [NXP Semiconductors], SAA7199BWP Datasheet - Page 31

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SAA7199BWP

Manufacturer Part Number
SAA7199BWP
Description
Digital Video Encoder DENC GENLOCK-capable
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7199BWP
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
Notes
1. XTALO, XTALI and TP are not characterized with respect to levels; CLKO is characterized up to 32 MHz and PIXCLK
2. Levels are measured with load circuit. LFCO output with 10 k in parallel with 15 pF and other outputs with 1.2 k
3. T
4. t
5. 3
6. 40 ns at low supply voltage (4 V) and high temperature (70 C).
1996 Sep 27
MPU timing A1, A0, R/W, CS, D(7 to 0) (pins 33 to 36, 37 to 40 and 43 to 46) see Fig.19
t
t
t
t
t
t
t
t
t
t
t
t
Output timing (pins 3, 74, 75 and 84); see Fig.18
t
SYMBOL
su(ADD)
h(ADD)
su(R)
h(R)
W(CL)
W(CH)
su;DAT
h;DAT
d(Q)
ZR
d(ZR)
d(RZ)
d
Digital Video Encoder (DENC)
GENLOCK-capable
up to 16 MHz.
in parallel with 40 pF at 3 V (TTL load).
PIXCLK(min)
LLC
[t
must be 63 to 89 ns at CREF = HIGH (pin 56); T
PIXCLK(min)
A1 and A0 address set-up time
(pins 33 and 34)
A1 and A0 address hold time
R/W set-up time (pin 35)
R/W hold time
CS pulse width LOW
CS pulse width HIGH
data set-up time (D7 to D0)
data hold time (D7 to D0)
data output hold time (D7 to D0)
delay to driven ports (D7 to D0)
delay to ports valid (D7 to D0)
port outputs disable time (D7 to D0)
output delay time
+ 5 ns.
+ 5 ns].
PARAMETER
note 4
note 4
write mode
write mode
read mode
read mode
read mode; note 5
read mode
minimum clock period;
note 6
LLC
31
CONDITIONS
= 16.5 ns is only allowed if the multiplexer clock is active.
4
25
4
25
95
95
80
5
5
5
MIN.
20
TYP.
Product specification
275
25
45
SAA7199B
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT

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