EPF8282A ALTERA [Altera Corporation], EPF8282A Datasheet - Page 7

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EPF8282A

Manufacturer Part Number
EPF8282A
Description
Programmable Logic Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet

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Altera Corporation
Figure 3. FLEX 8000 LE
LABCTRL1
LABCTRL2
LABCTRL3
LABCTRL4
DATA1
DATA2
DATA3
DATA4
Each LAB provides four control signals that can be used in all eight LEs.
Two of these signals can be used as clocks, and the other two for
clear/preset control. The LAB control signals can be driven directly from
a dedicated input pin, an I/O pin, or any internal signal via the LAB local
interconnect. The dedicated inputs are typically used for global clock,
clear, or preset signals because they provide synchronous control with
very low skew across the device. FLEX 8000 devices support up to four
individual global clock, clear, or preset control signals. If logic is required
on a control signal, it can be generated in one or more LEs in any LAB and
driven into the local interconnect of the target LAB.
Logic Element
The logic element (LE) is the smallest unit of logic in the FLEX 8000
architecture, with a compact size that provides efficient logic utilization.
Each LE contains a 4-input LUT, a programmable flipflop, a carry chain,
and cascade chain.
The LUT is a function generator that can quickly compute any function of
four variables. The programmable flipflop in the LE can be configured for
D, T, JK, or SR operation. The clock, clear, and preset control signals on the
flipflop can be driven by dedicated input pins, general-purpose I/O pins,
or any internal logic. For purely combinatorial functions, the flipflop is
bypassed and the output of the LUT goes directly to the output of the LE.
Look-Up
Preset
Select
Clear/
Clock
(LUT)
Logic
Table
Carry-Out
Carry-In
Chain
Carry
FLEX 8000 Programmable Logic Device Family Data Sheet
Cascade-Out
Figure 3
Cascade-In
Cascade
Chain
shows a block diagram of an LE.
DFF
D
CLRN
PRN
Q
LE-Out
7
3

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