EPF10K100 ALTERA [Altera Corporation], EPF10K100 Datasheet - Page 22
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EPF10K100
Manufacturer Part Number
EPF10K100
Description
Embedded Programmable Logic Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EPF10K100.pdf
(128 pages)
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22
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
During compilation, the Compiler automatically selects the best control
signal implementation. Because the clear and preset functions are active-
low, the Compiler automatically assigns a logic high to an unused clear or
preset.
The clear and preset logic is implemented in one of the following six
modes chosen during design entry:
In addition to the six clear and preset modes, FLEX 10K devices provide a
chip-wide reset pin that can reset all registers in the device. Use of this
feature is set during design entry. In any of the clear and preset modes, the
chip-wide reset overrides all other signals. Registers with asynchronous
presets may be preset when the chip-wide reset is asserted. Inversion can
be used to implement the asynchronous preset.
of how to enter a section of a design for the desired functionality.
Asynchronous clear
Asynchronous preset
Asynchronous clear and preset
Asynchronous load with clear
Asynchronous load with preset
Asynchronous load without clear or preset
Figure 10
Altera Corporation
shows examples