EPF10K100 ALTERA [Altera Corporation], EPF10K100 Datasheet - Page 61
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EPF10K100
Manufacturer Part Number
EPF10K100
Description
Embedded Programmable Logic Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EPF10K100.pdf
(128 pages)
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Altera Corporation
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EABDATA1
EABDATA2
EABWE1
EABWE2
EABCLK
EABCO
EABBYPASS
EABSU
EABH
AA
WP
WDSU
WDH
WASU
WAH
WO
DD
EABOUT
EABCH
EABCL
Table 34. EAB Timing Microparameters
Symbol
Data or address delay to EAB for combinatorial input
Data or address delay to EAB for registered input
Write enable delay to EAB for combinatorial input
Write enable delay to EAB for registered input
EAB register clock delay
EAB register clock-to-output delay
Bypass register delay
EAB register setup time before clock
EAB register hold time after clock
Address access delay
Write pulse width
Data setup time before falling edge of write pulse
Data hold time after falling edge of write pulse
Address setup time before rising edge of write pulse
Address hold time after falling edge of write pulse
Write enable to data output valid delay
Data-in to data-out valid delay
Data-out delay
Clock high time
Clock low time
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Note (1)
Parameter
(5)
(5)
(5)
(5)
Conditions
61