XCS10 XILINX [Xilinx, Inc], XCS10 Datasheet - Page 58

• Manufacturer Part Number: XCS10
• Description: Spartan and Spartan-XL FPGA Families Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

Spartan and Spartan-XL FPGA Families Data Sheet
Spartan-XL Family Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Pin-to-pin timing
parameters are derived from measuring external and inter-
nal test patterns and are guaranteed over worst-case oper-
Spartan-XL Family Output Flip-Flop, Clock-to-Out
58
Notes:
1.
2.
3.
Global Clock to Output using OFF
Slew Rate Adjustment
Symbol
T
T
ICKOF
SLOW
Output delays are representative values where one global clock input drives one vertical clock line in each accessible column,and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at ~50% V
OFF = Output Flip Flop
Fast
For Output SLOW option add
Description
CC
threshold with 50 pF external capacitive load.
www.xilinx.com
ating conditions (supply voltage and junction temperature).
Listed below are representative values for typical pin loca-
tions and normal clock loading.
All Devices
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
Device
Max
4.6
4.9
5.2
5.5
5.8
1.5
-5
Speed Grade
DS060 (v1.8) June 26, 2008
Product Specification
Max
5.2
5.5
5.8
6.2
6.5
1.7
-4
Units
ns
ns
ns
ns
ns
ns
R