MK60FX512VLQ15 FREESCALE [Freescale Semiconductor, Inc], MK60FX512VLQ15 Datasheet
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MK60FX512VLQ15
Manufacturer Part Number
MK60FX512VLQ15
Description
K60 Sub-Family Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MK60FX512VLQ15.pdf
(82 pages)
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Company:
Part Number:
MK60FX512VLQ15
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MK60FX512VLQ15
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Freescale Semiconductor
Data Sheet: Advance Information
K60 Sub-Family Data Sheet
Supports the following:
MK60FX512VLQ15,
MK60FN1M0VLQ15,
MK60FX512VMD15,
MK60FN1M0VMD15
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© 2012 Freescale Semiconductor, Inc.
Preliminary
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 150 MHz ARM Cortex-M4 core with DSP
– Up to 1024 KB program flash memory on non-
– Up to 512 KB program flash memory on
– Up to 512 KB FlexNVM on FlexMemory devices
– 16 KB FlexRAM on FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
– NAND flash controller interface
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– 10 low-power modes to provide power optimization
– Memory protection unit with multi-master
– 32-channel DMA controller, supporting up to 128
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
FlexMemory devices
based on application requirements
protection
request sources
• Security and integrity modules
• Human-machine interface
• Analog modules
• Timers
– Hardware CRC module to support fast cyclic
– Hardware random-number generator
– Hardware encryption supporting DES, 3DES, AES,
– 128-bit unique identification (ID) number per chip
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Four 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
– Two 12-bit DACs
– Four analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Two 8-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– IEEE 1588 timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
redundancy checks
MD5, SHA-1, and SHA-256 algorithms
integrated into each ADC
DAC and programmable reference input
timers
timers
K60P144M150SF3
Document Number: K60P144M150SF3
Rev. 3, 2/2012