MK61FX512VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FX512VMD12 Datasheet - Page 13

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MK61FX512VMD12

Manufacturer Part Number
MK61FX512VMD12
Description
K61 Sub-Family
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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MK61FX512VMD12
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1. All 5 V tolerant digital I/O pins are internally clamped to V
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to V
5.2.2 LVD and POR operating requirements
Freescale Semiconductor, Inc.
Symbol
V
Symbol
V
to V
the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection current
limiting resistor is calculated as R=(V
(=V
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(V
calculated as R=(V
V
I
I
I
V
RFVBAT
V
ICcont
LVDH
ICDIO
ICAIO
POR
V
V
RAM
HYS
IH
IL
SS
DD
-0.3V) and V
. If V
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
Description
Input high voltage (digital pins except Tamper pins )
Input low voltage (digital pins except Tamper pins )
Input hysteresis (digital pins except Tamper pins )
Digital pin (except Tamper pins) negative DC injection
current — single pin
Analog
injection current — single pin
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
V
V
IN
Description
DD
BAT
Table 1. Voltage and current operating requirements (continued)
greater than V
• 2.7 V ≤ V
• 1.7 V ≤ V
• 2.7 V ≤ V
• 1.7 V ≤ V
• V
• V
• V
• Negative current injection
• Positive current injection
voltage required to retain RAM
voltage required to retain the VBAT register file
2
IN
IN
IN
IN
, EXTAL0/XTAL0, and EXTAL1/XTAL1 pin DC
IN
< V
< V
> V
-V
is less than V
AIO_MAX
SS
SS
DD
Table 2. LVD and POR operating requirements
DD
DD
DD
DD
-0.3V
-0.3V (Negative current injection)
+0.3V (Positive current injection)
DIO_MIN
≤ 3.6 V
≤ 2.7 V
≤ 3.6 V
≤ 2.7 V
)/|I
IC
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
AIO_MAX
|. Select the larger of these two calculated resistances.
(=V
DIO_MIN
SS
-0.3V) is observed, then there is no need to provide current limiting resistors at
Table continues on the next page...
(=V
SS
-V
and V
DD
IN
+0.3V) is observed, then there is no need to provide current limiting
)/|I
IC
DD
|.
AIO_MIN
through ESD protection diodes. If V
SS
through a ESD protection diode. There is no diode connection
-V
IN
2.48
Min.
0.8
)/|I
IC
0.75 × V
0.06 × V
V
0.7 × V
|. The positive injection current limiting resistor is
POR_VBAT
Min.
-25
1.2
-5
-5
DD
2.56
Typ.
DD
DD
1.1
0.35 × V
0.3 × V
Max.
+25
+5
Max.
2.64
IN
1.5
DD
DD
is greater than V
Unit
mA
mA
mA
V
V
V
V
V
V
V
Unit
V
V
AIO_MIN
Notes
Notes
General
1
3
13

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