SL811HS_07 CYPRESS [Cypress Semiconductor], SL811HS_07 Datasheet - Page 22

• Manufacturer Part Number: SL811HS_07
• Description: Embedded USB Host/Slave Controller
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document 38-08008 Rev. *D
Table 35. 48/28-Pin TQFP AXC Pin Assignments and Definitions (continued)
Notes
48-Pin TQFP
AXC Pin No.
8. VDD can be derived from the USB supply. Figure 5 on page 19 shows a simple method to provide 3.3V/30 mA. Another option is to use a Torex Semiconductor,
9. The A0 Address bit is used to access address register or data registers in I/O Mapped or Memory Mapped applications.
Ltd. 3.3V SMD regulator (part number XC62HR3302MR).
42
33
34
35
36
37
38
39
40
41
43
44
45
46
47
48
[9]
28-Pin PLCC
Pin No.
28
1
25
26
27
–
–
–
–
–
2
3
4
–
–
–
[9]
[8]
Pin Type
BIDIR
BIDIR
VDD
OUT
NC
NC
NC
NC
NC
NC
NC
NC
IN
IN
IN
IN
Pin Name
+3.3 VDC
nDACK
nDRQ
nRD
M/S
NC
NC
NC
NC
NC
NC
NC
NC
D6
D7
A0
Data 6. Microprocessor Data/Address Bus.
No connection.
No connection.
No connection.
No connection.
No connection.
Data 7. Microprocessor Data/Address Bus.
Master/Slave Mode Select. ’1’ selects Slave. ’0’ = Master.
Device V
A0 = ’0’. Selects address pointer. Register A0 = ’1’. Selects data
buffer or register.
DMA Acknowledge. An active LOW input used to interface to
an external DMA controller. DMA is enabled only in slave mode.
In host mode, the pin should be tied HIGH (logic ’1’).
DMA Request. An active LOW output used with an external
DMA controller. nDRQ and nDACK form the handshake for DMA
data transfers. In host mode, leave the pin unconnected.
Read Strobe Input. An active LOW input used with nCS to read
registers/data memory.
No connection.
No connection.
No connection.
DD
Power.
Pin Description
SL811HS
Page 22 of 32
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