XE88LC05MI000 ETC1 [List of Unclassifed Manufacturers], XE88LC05MI000 Datasheet - Page 14

• Manufacturer Part Number: XE88LC05MI000
• Description: 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

Data Acquisition Microcontroller
XE88LC05
6.14 Acquisition chain
Table 6.14:
6.15 DACs
Table 6.15:
6.16 Vmult and Vld registers
Table 6.16:
Address
h0060
h0061
h0062
h0063
h0064
h0065
h0066
h0067
Address
h0074
h0075
h0076
h0077
h0078
h0079
Address
h007C
h007E
h007F
14
RegAcOutMsb
RegVmultCfg0
RegDasInMsb
RegAcOutLsb
RegDasInLsb
RegDab1Cfg
RegDasCfg0
RegDasCfg1
RegAcCfg0
RegAcCfg1
RegAcCfg2
RegAcCfg3
RegAcCfg4
RegAcCfg5
RegDab1In
RegVldStat
RegVldCtrl
Name
Name
Name
IbAmpADC(1) IbAmpAdc(0) IbAmpPga(1) IbAmpPga(0)
DasInMSB(7) DasInMSB(6) DasInMSB(5) DasInMSB(4) DasInMSB(3) DasInMSB(2) DasInMSB(1) DasInMSB(0)
r0w, 0 global
DasInLSB(7) DasInLSB(6) DasInLSB(5) DasInLSB(4) DasInLSB(3) DasInLSB(2) DasInLSB(1) DasInLSB(0)
AdcOutM(7)
AdcOutL(7)
rw, 1 global
rw, 0 global
rw, 0 global
NSOrder(1)
rw, 0 global
Pga1Gain
r, 0 global
DabIn(7)
Fin(1)
Acquisition chain control registers
DACs control registers
Vmult and Vld control registers
Start
Busy
w
w
w
7
7
7
r
r
Pga3Gain(6) Pga3Gain(5) Pga3Gain(4) Pga3Gain(3) Pga3Gain(2) Pga3Gain(1) Pga3Gain(0)
AdcOutM(6)
AdcOutL(6)
rw, 0 global
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
NSOrder(0)
rw, 0 global
NelConv(1)
Pga3Off(6)
DabIn(6)
Fin(0)
wr0
Def
w
w
w
6
6
6
r
r
Pga2Gain(1) Pga2Gain(0)
CodeIMax(2) CodeIMax(1) CodeIMax(0) DasEnable(1) DasEnable(0)
AdcOutM(5)
AdcOutL(5)
rw, 1 global
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
NelConv(0)
Pga3Off(5)
DabIn(5)
AMux(4)
w
w
w
5
5
5
r
r
AdcOutM(4)
AdcOutL(4)
rw, 0 global
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
Pga3Off(4)
AMux(3)
DabIn(4)
OSR(2)
4
4
w
w
w
4
r
r
AdcOutM(3)
AdcOutL(3)
rw, 1 global
rw, 0 global
rw, 0 global
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
Pga2Off(3)
Pga3Off(3)
Enable(3)
rw, 0 cold
AMux(2)
DabIn(3)
OSR(1)
VldMult
3
3
w
w
w
3
r
r
AdcOutM(2)
AdcOutL(2)
rw, 0 global
rw, 0 global
rw, 0 global
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
Pga2Off(2)
Pga3Off(2)
VldTune(2)
Enable(2)
r, 0 global
rw, 0 cold
DabIn(2)
AMux(1)
OSR(0)
Enable
VldIrq
w
w
w
2
2
2
r
r
AdcOutM(1)
AdcOutL(1)
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
Pga2Off(1)
Pga3Off(1)
VldTune(1)
Enable(1)
Enable(1)
r, 0 global
rw, 0 cold
DabIn(1)
AMux(0)
VldValid
Dab1-
Fin(1)
Cont
BW
w
w
w
1
1
1
r
r
AdcOutM(0)
AdcOutL(0)
rw, 1 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
rw, 0 global
VldTune(0)
Pga2Off(0)
Pga3Off(0)
Enable(0)
Enable(0)
rw, 0 cold
DabIn(0)
D0109-40
Dab1-
Fin(0)
VldEn
VMux
Fin
Inv
w
w
w
0
0
0
r
r