CY8C20X36A CYPRESS [Cypress Semiconductor], CY8C20X36A Datasheet - Page 8

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CY8C20X36A

Manufacturer Part Number
CY8C20X36A
Description
CapSense Applications Operating Range: 1.71 V to 5.5 V
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
24-Pin QFN
Table 2. Pin Definitions š CY8C20336A, CY8C20346A
Document Number: 001-54459 Rev. *E
Notes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CP
LEGEND A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output.
Pin
No.
5. The center pad (CP) on the QFN package must be connected to ground (V
6. On power-up , the SDA(P1[0]) drives a strong high for 256 sleep clock cycles and drives resistive low for the next 256 sleep clock cycles. The SCL(P1[1])line drives
7. Alternate SPI clock.
it must be electrically floated and not connected to any other signal.
resistive low for 512 sleep clock cycles and both the pins transition to high impedance state. On reset, after XRES de-asserts, the SDA and the SCL lines drive
resistive low for 8 sleep clock cycles and transition to high impedance state. Hence, during power-up or reset event, P1[1] and P1[0] may disturb the I2C bus. Use
alternate pins if you encounter issues.
Digital Analog
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IOH
I/O
I/O
I/O
I/O
Power
Power
Power
Type
Input
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Name
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
NC
V
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P2[0]
P0[0]
P0[2]
P0[4]
P0[6]
V
P0[7]
P0[5]
P0[3]
P0[1]
V
SS
SS
DD
Crystal output (XOut)
Crystal input (XIn)
I
I
SPI CLK
ISSP CLK
MOSI
No connection
Ground connection
ISSP DATA
CLK
Optional external clock input
(EXTCLK)
Active high external reset with
internal pull-down
Supply voltage
Integrating input
Integrating input
Center pad must be connected
to ground
2
2
C SCL, SPI SS
C SDA, SPI MISO
[7]
Description
[6]
[6]
, I
, I
2
C SCL, SPI
2
C SDA, SPI
[5]
SS
) for best mechanical, thermal, and electrical performance. If not connected to ground,
Figure 3. CY8C20336A, CY8C20346A PSoC Device
A I, I2 C S D A , S P I M IS O , P 1 [5 ]
A I, I2 C S C L , S P I S S , P 1 [7 ]
A I, S P I C L K , P 1 [3 ]
A I, X O u t, P 2 [5]
CY8C20X36A/46A/66A/96A
A I, X In , P 2 [3 ]
A I, P 2 [1 ]
1
4
2
3
5
6
(T o p V ie w )
Q F N
1 8
1 7
1 6
1 5
1 4
1 3
P 0 [4 ], A I
P 2 [0 ], A I
P 1 [6 ], A I
P 0 [2 ], A I
P 0 [0 ], A I
X R E S
Page 8 of 43
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