CY8C20X37 CYPRESS [Cypress Semiconductor], CY8C20X37 Datasheet - Page 4

• Manufacturer Part Number: CY8C20X37
• Manufacturer: CYPRESS [Cypress Semiconductor]

PSoC
The PSoC family consists of many devices with on-chip
controllers. These devices are designed to replace multiple
traditional MCU-based system components with one low-cost
single-chip programmable component. A PSoC device includes
configurable
programmable interconnect. This architecture makes it possible
for you to create customized peripheral configurations, to match
the requirements of each individual application. Additionally, a
fast central processing unit (CPU), flash program memory,
SRAM data memory, and configurable I/O are included in a
range of convenient pinouts.
The architecture for this device family, as shown in the
Block Diagram on page
■
■
■
A common, versatile bus allows connection between I/O and the
analog system.
Each CY8C20x37/47/67/S PSoC device includes a dedicated
CapSense block that provides sensing and scanning control
circuitry for capacitive sensing applications. Depending on the
PSoC package, up to 34 GPIOs are also included. The GPIOs
provide access to the MCU and analog mux.
PSoC Core
The PSoC core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, and IMO and
ILO. The CPU core, called the M8C, is a powerful processor with
speeds up to 24 MHz. The M8C is a 4-million instructions per
second (MIPS), 8-bit Harvard-architecture microprocessor.
CapSense System
The analog system contains the capacitive sensing hardware.
Several hardware algorithms are supported. This hardware
performs capacitive sensing and scanning without requiring
external components. The analog system is composed of the
CapSense PSoC block and an internal 1 V or 1.2 V analog
reference, which together support capacitive sensing of up to 31
inputs
Scanning of enabled CapSense pins is completed quickly and
easily across multiple ports.
SmartSense™ Auto-tuning
SmartSense auto-tuning is an innovative solution from Cypress
that removes manual tuning of CapSense applications. This
solution is easy to use and provides robust noise immunity. It is
the only auto-tuning solution that establishes, monitors, and
maintains all required tuning parameters of each sensor during
run time. SmartSense auto-tuning allows engineers to go from
prototyping
manufacturing variations in PCB and/or overlay material
properties.
Document Number: 001-69257 Rev. *F
Note
3. 34 GPIOs = 31 pins for capacitive sensing+2 pins for I
The core
CapSense analog system
System resources
[3]
®
. Capacitive sensing is configurable on each GPIO pin.
Functional Overview
to
blocks
mass
of
2, consists of three main areas:
production
analog
and
without
digital
2
C + 1 pin for modulator capacitor.
retuning
logic,
Logic
and
for
Figure 1. CapSense System Block Diagram
Analog Multiplexer System
The analog mux bus can connect to every GPIO pin. Pins are
connected to the bus individually or in any combination. The bus
also connects to the analog system for analysis with the
CapSense block comparator.
Switch-control logic enables selected pins to precharge
continuously under hardware control. This enables capacitive
measurement for applications such as touch sensing. Other
multiplexer applications include:
■
■
■
Complex capacitive sensing interfaces, such as sliders and
touchpads.
Chip-wide mux that allows analog input from any I/O pin.
Crosspoint connection between any I/O pin combinations.
Vr
IMO
Comparator
IDAC
Reference
Buffer
Clock Select
CY8C20x37/37S/47/47S/67/67S
CapSense
CSCLK
Cap Sense Counters
Mux
Mux
Refs
Oscillator
CS1
CS2
CSN
Cexternal (P0[1]
Page 4 of 39
or P0[3])