PIC12C672 MICROCHIP [Microchip Technology], PIC12C672 Datasheet - Page 29

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PIC12C672

Manufacturer Part Number
PIC12C672
Description
8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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8.0
What sets a microcontroller apart from other
processors are special circuits to deal with the needs
of real-time applications. The PIC12CE5XX family of
microcontrollers has a host of such features intended
to maximize system reliability, minimize cost through
elimination of external components, provide power
saving operating modes and offer code protection.
These features are:
• Oscillator selection
• Reset
• Watchdog Timer (WDT)
• SLEEP
• Code protection
• ID locations
• In-circuit Serial Programming
FIGURE 8-1:
1997 Microchip Technology Inc.
- Power-On Reset (POR)
- Device Reset Timer (DRT)
- Wake-up from SLEEP on pin change
bit 11-5: Unimplemented
bit 4:
bit 3:
bit 2:
bit 1-0:
Note 1: Refer to the PIC12C5XX Programming Specifications to determine how to access the
bit11
SPECIAL FEATURES OF THE
CPU
MCLRE: MCLR enable bit.
1 = MCLR pin enabled
0 = MCLR tied to V
CP: Code protection bit.
1 = Code protection off
0 = Code protection on
WDTE: Watchdog timer enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0: Oscillator selection bits
11 = EXTRC - external RC oscillator
10 = INTRC - internal RC oscillator
01 = XT oscillator
00 = LP oscillator
configuration word. This register is not user addressable during device operation. Refer to
In-Circuit Serial Programming™ Guide.
10
CONFIGURATION WORD FOR PIC12CE5XX
9
8
DD
, (Internally)
7
6
Preliminary
5
MCLRE
4
The PIC12CE5XX has a Watchdog Timer which can
be shut off only through configuration bit WDTE. It
runs off of its own RC oscillator for added reliability. If
using XT or LP selectable oscillator options, there is
always an 18 ms (nominal) delay provided by the
Device Reset Timer (DRT), intended to keep the chip
in reset until the crystal oscillator is stable. If using
INTRC or EXTRC there is an 18 ms delay only on V
power-up. With this timer on-chip, most applications
need no external reset circuitry.
The SLEEP mode is designed to offer a very low
current power-down mode. The user can wake-up
from SLEEP through a change on input pins or
through a Watchdog Timer time-out. Several oscillator
options are also made available to allow the part to fit
the application, including an internal 4 MHz oscillator.
The EXTRC oscillator option saves system cost while
the LP crystal option saves power. A set of
configuration bits are used to select various options.
8.1
The PIC12CE5XX configuration word consists of 5
bits. Configuration bits can be programmed to select
various device configurations. Two bits are for the
selection of the oscillator type, one bit is the Watchdog
Timer enable bit, and one bit is the MCLR enable bit.
One bit is the code protection bit (Figure 8-1).
CP
3
WDTE FOSC1 FOSC0
Configuration Bits
2
1
PIC12CE5XX
bit0
Register:
Address
DS40172A-page 29
(1)
:
CONFIG
FFFh
DD

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