NG80960JA-16 INTEL [Intel Corporation], NG80960JA-16 Datasheet - Page 4

• Manufacturer Part Number: NG80960JA-16
• Description: EMBEDDED 32-BIT MICROPROCESSOR
• Manufacturer: INTEL [Intel Corporation]

80960JA/JF/JD/JT 3.3 V Microprocessor
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80960Jx Microprocessor Package Options...........................................................7
80960Jx Block Diagram ........................................................................................9
132-Lead Pin Grid Array Bottom View - Pins Facing Up.....................................22
132-Lead Pin Grid Array Top View - Pins Facing Down .....................................23
132-Lead PQFP - Top View ................................................................................26
196-Ball Mini Plastic Ball Grid Array Bottom View - Balls Facing Up ..................29
196-Ball Mini Plastic Ball Grid Array Top View - Balls Facing Down ..................30
VCC5 Current-Limiting Resistor ..........................................................................40
VCCPLL Lowpass Filter ......................................................................................41
AC Test Load ......................................................................................................47
Output Delay or Hold vs. Load Capacitance .......................................................48
T
80960JA/JF I
80960JA/JF I
80960JD I
80960JD I
80960JT I
80960JT I
CLKIN Waveform ................................................................................................52
T
T
T
T
T
T
T
DT/R and DEN Timings Waveform .....................................................................55
TCK Waveform....................................................................................................56
T
T
T
T
Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus .........58
Burst Read and Write Transactions Without Wait States, 32-Bit Bus .................59
Burst Write Transactions With 2,1,1,1 Wait States, 32-Bit Bus...........................60
Burst Read and Write Transactions Without Wait States, 8-Bit Bus ...................61
Burst Read and Write Transactions With 1, 0 Wait States and
Extra Tr State on Read, 16-Bit Bus .....................................................................62
Double Word Read Bus Request, Misaligned One Byte From
Quad Word Boundary, 32-Bit Bus, Little Endian .................................................63
HOLD/HOLDA Waveform For Bus Arbitration ....................................................64
Cold Reset Waveform .........................................................................................65
Warm Reset Waveform .......................................................................................66
Entering the ONCE State ....................................................................................67
Bus States with Arbitration ..................................................................................68
Summary of Aligned and Unaligned Accesses (32-Bit Bus) ...............................72
Summary of Aligned and Unaligned Accesses (32-Bit Bus) (Continued) ...........73
80960JT Device Identification Register...............................................................74
80960JD Device Identification Register ..............................................................75
80960JA/JF Device Identification Register .........................................................76
LX
OV1
OF
IS1
IS2
IS3
IS4
LX
BSIS1
BSOV1
BSOV2
BSIS2
, T
vs. AD Bus Load Capacitance......................................................................48
Output Float Waveform................................................................................53
and T
and T
and T
and T
Output Delay Waveform .............................................................................52
LXL
and T
and T
and T
and T
CC
CC
and T
CC
CC
IH1
IH2
IH3
IH4
BSIH1
BSIH2
Active (Power Supply) vs. Frequency ...........................................51
Active (Thermal) vs. Frequency .....................................................51
CC
CC
Active (Power Supply) vs. Frequency............................................50
Active (Thermal) vs. Frequency.....................................................50
Input Setup and Hold Waveform ...................................................53
Input Setup and Hold Waveform ...................................................53
Input Setup and Hold Waveform ...................................................54
Input Setup and Hold Waveform ...................................................54
BSOF1
BSOF2
LXA
Active (Power Supply) vs. Frequency .......................................49
Active (Thermal) vs. Frequency ................................................49
Input Setup and Hold Waveforms .........................................56
Input Setup and Hold Waveform ...........................................57
Relative Timings Waveform.................................................55
Output Delay and Output Float Waveform..........................56
Output Delay and Output Float Waveform..........................57
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