MPC859T FREESCALE [Freescale Semiconductor, Inc], MPC859T Datasheet - Page 36

• Manufacturer Part Number: MPC859T
• Description: Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Bus Signal Timing
Bus Signal Timing
Table 10 shows the interrupt timing for the MPC866/859.
Figure 25 shows the interrupt detection timing for the external level-sensitive lines.
Figure 26 shows the interrupt detection timing for the external edge-sensitive lines.
36
1
Num
I39
I40
I41
I42
I43
The timings I39 and I40 describe the testing conditions under which the IRQ lines are tested when being defined as
level sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference
to the CLKOUT.
The timings I41, I42, and I43 are specified to allow the correct function of the IRQ lines detection circuitry, and has
no direct relation with the total system interrupt latency that the MPC866/859 is able to support.
CLKOUT
CLKOUT
IRQx valid to CLKOUT rising edge (setup time)
IRQx hold time after CLKOUT
IRQx pulse width low
IRQx pulse width high
IRQx edge-to-edge time
IRQx
IRQx
Figure 25. Interrupt Detection Timing for External Level Sensitive Lines
Figure 26. Interrupt Detection Timing for External Edge Sensitive Lines
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC866/859 Hardware Specifications
Characteristic
Table 10. Interrupt Timing
Go to: www.freescale.com
I39
1
I43
I41
I40
I43
I42
4xT
All Frequencies
CLOCKOUT
6.00
2.00
3.00
3.00
Min
MOTOROLA
Max
—
—
—
—
—
Unit
ns
ns
ns
ns
—