CY8C38_1105 CYPRESS [Cypress Semiconductor], CY8C38_1105 Datasheet - Page 29

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CY8C38_1105

Manufacturer Part Number
CY8C38_1105
Description
Programmable System-on-Chip (PSoC) Multiply and divide instructions
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
6.2 Power System
The power system consists of separate analog, digital, and I/O supply pins, labeled Vdda, Vddd, and Vddiox, respectively. It also
includes two internal 1.8-V regulators that provide the digital (Vccd) and analog (Vcca) supplies for the internal core logic. The output
pins of the regulators (Vccd and Vcca) and the Vddio pins must have capacitors connected as shown in
pins must be shorted together, with as short a trace as possible, and connected to a 1-µF ±10-percent X5R capacitor. The power
system also contains a sleep regulator, an I
Note The two Vccd pins must be connected together with as short a trace as possible. A trace under the device is recommended, as
shown in
Document Number: 001-11729 Rev. *S
Figure 2-6
on page 10.
Vddio1
Vddio2
Vssb
0.1 µF
0.1 µF
I/O Supply
I/O Supply
Domain
Digital
2
C regulator, and a hibernate regulator.
Figure 6-4. PSoC Power System
1 µF
Regulators
Digital
0.1 µF
Vddd
Vddd
0.1 µF
I/O Supply
Regulator
Regulator
Regulator
Hibernate
Regulator
Analog
Domain
Analog
Sleep
I2C
I/O Supply
PSoC
0.1 µF
Vddio0
®
Vdda
Vcca
Vssa
Vddio3
3: CY8C38 Family
Figure
Vddio0
6-4. The two Vccd
1 µF
0.1 µF
Data Sheet
Vdda
Page 29 of 130
0.1 µF
.
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