DP83848YB_08 NSC [National Semiconductor], DP83848YB_08 Datasheet - Page 78
DP83848YB_08
Manufacturer Part Number
DP83848YB_08
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.DP83848YB_08.pdf
(84 pages)
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8.2.24 100 Mb/s Internal Loopback Timing
Note1: Due to the nature of the descrambler function, all 100BASE-TX Loopback modes will cause an initial “dead-time”
of up to 550 s during which time no data will be present at the receive MII outputs. The 100BASE-TX timing specified is
based on device delays after the initial 550 s “dead-time”.
Note2: Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
T2.24.1
Parameter
RXD[3:0]
TXD[3:0]
TX_CLK
RX_CLK
TX_EN to RX_DV Loopback
TX_EN
RX_DV
CRS
Description
T2.24.1
100 Mb/s internal loopback mode
78
Notes
Min
Typ
Max
240
Units
ns
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