PIC18C658 MICROCHIP [Microchip Technology], PIC18C658 Datasheet - Page 109
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PIC18C658
Manufacturer Part Number
PIC18C658
Description
High-Performance Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C658.pdf
(366 pages)
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9.0
The Parallel Slave Port is an 8-bit parallel interface for
transferring data between the PIC18CXX8 device and
an external device.
PORTD operates as an 8-bit wide Parallel Slave Port,
or microprocessor port when control bit PSPMODE
(PSPCON register) is set. In Slave mode, it is asyn-
chronously readable and writable by the external world
through RD control input pin RE0/RD and WR control
input pin RE1/WR.
It can directly interface to an 8-bit microprocessor data
bus. The external microprocessor can read or write the
PORTD latch as an 8-bit latch. Setting bit PSPMODE
enables port pin RE0/RD to be the RD input, RE1/WR
to be the WR input and RE2/CS to be the CS (chip
select) input. For this functionality, the corresponding
data direction bits of the TRISE register (TRISE<2:0>)
must be configured as inputs (set).
A write to the PSP occurs when both the CS and WR
lines are first detected low. A read from the PSP occurs
when both the CS and RD lines are first detected low.
The PORTE I/O pins become control inputs for the
microprocessor port when bit PSPMODE (PSPCON
Register) is set. In this mode, the user must make sure
that the TRISE<2:0> bits are set (pins are configured
as digital inputs). In this mode, the input buffers are
TTL.
2000 Microchip Technology Inc.
PARALLEL SLAVE PORT
Advanced Information
FIGURE 9-1:
One bit of PORTD
Data Bus
Set Interrupt Flag
PSPIF (PIR1<7>)
Note:
WR LATD
WR PORTD
or
RD PORTD
I/O pins have diode protection to V
RD LATD
Data Latch
Q
D
CK
PORTD AND PORTE BLOCK
DIAGRAM
(PARALLEL SLAVE PORT)
EN
EN
Q
D
PIC18CXX8
Chip Select
Read
Write
DS30475A-page 109
TTL
DD
TTL
TTL
TTL
and V
SS
RDx Pin
.
CS
WR
RD
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