MC68HC11A1 MOTOROLA [Motorola, Inc], MC68HC11A1 Datasheet - Page 11

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MC68HC11A1

Manufacturer Part Number
MC68HC11A1
Description
8-Bit Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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HPRIO — Highest Priority I-Bit Interrupt and Miscellaneous
RBOOT — Read Bootstrap ROM
SMOD —Special Mode Select
MDA — Mode Select A
IRV — Internal Read Visibility
PSEL3–PSEL0 — Priority Select Bits 3 through 0
INIT — RAM and I/O Mapping
RAM[3:0] —256-Byte Internal RAM Map Position
REG[3:0] —64-Byte Register Block Map Position
MC68HC11A8
MC68HC11A8TS/D
RESET:
RESET:
RBOOT, SMOD, and MDA reset depend on conditions at reset and can only be written in special modes
(SMOD = 1).
Refer to 3 Resets and Interrupts .
RAM[3:0] determine the upper four bits of the RAM address, positioning RAM at the selected 4K bound-
ary.
REG[3:0] determine the upper four bits of the register address, positioning registers at the selected 4K
boundary. Register can be written only once in the first 64 cycles out of reset in normal modes, or any
time in special modes.
0 = Bootloader ROM disabled and not in map
1 = Bootloader ROM enabled and in map at $BF40–$BFFF
0 = No internal read visibility on external bus
1 = Data from internal reads is driven out through the external data bus
MODB
RBOOT
1
1
0
0
RAM3
Bit 7
Bit 7
0
Inputs
SMOD
RAM2
6
6
0
MODA
0
1
0
1
RAM1
MDA
5
5
0
Single Chip
Expanded Multiplexed
Special Bootstrap
Special Test
RAM0
IRV
4
4
0
Mode
PSEL3
REG3
3
0
3
0
PSEL2
REG2
2
1
2
0
PSEL1
REG1
RBOOT
1
0
1
0
0
0
1
0
$103C
Latched at Reset
$103D
PSEL0
REG0
Bit 0
Bit 0
1
1
SMOD
0
0
1
1
MOTOROLA
MDA
0
1
0
1
11

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