PIC18F23K20 MICROCHIP [Microchip Technology], PIC18F23K20 Datasheet - Page 123

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PIC18F23K20

Manufacturer Part Number
PIC18F23K20
Description
28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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TABLE 10-1:
TABLE 10-2:
 2010 Microchip Technology Inc.
PORTA
LATA
TRISA
ANSEL
SLRCON
CM1CON0
CM2CON0
CVRCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1:
OSC1/CLKIN/RA7
Legend:
Name
2:
Pin
RA<7:6> and their associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.
Not implemented on PIC18F2XK20 devices.
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
TRISA7
LATA7
ANS7
CVREN
RA7
C1ON
C2ON
Bit 7
PORTA I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Function
(1)
CLKIN
OSC1
(2)
(1)
RA7
(1)
TRISA6
LATA6
ANS6
CVROE
C1OUT
C2OUT
RA6
Bit 6
Setting
TRIS
(1)
(2)
(1)
0
1
x
x
(1)
PORTA Data Latch Register (Read and Write to Data Latch)
PORTA Data Direction Control Register
ANS5
CVRR
C1OE
C2OE
Bit 5
I/O
RA5
O
I
I
I
(2)
Type
ANA
ANA
DIG
TTL
I/O
SLRE
CVRSS
C1POL
C2POL
ANS4
Bit 4
RA4
LATA<7> data output. Disabled in external oscillator modes.
PORTA<7> data input. Disabled in external oscillator modes.
Main oscillator input connection.
Main clock input connection.
(2)
SLRD
CVR3
ANS3
C1SP
C2SP
PIC18F2XK20/4XK20
Bit 3
RA3
(2)
ANS2
SLRC
CVR2
Bit 2
RA2
C1R
C2R
Description
C1CH1
C2CH1
ANS1
SLRB
CVR1
Bit 1
RA1
C1CH0
C2CH0
CVR0
ANS0
SLRA
Bit 0
DS41303G-page 123
RA0
on page
Values
Reset
62
62
62
62
63
62
62
61

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