AIC1574 AIC [Analog Intergrations Corporation], AIC1574 Datasheet - Page 14

• Manufacturer Part Number: AIC1574
• Description: 5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers
• Manufacturer: AIC [Analog Intergrations Corporation]

the linear under-voltage threshold, the LUV signal
sets the over-current latch if C
Cycling the bias input power (off then on ) reset the
counter and the fault latch.
The over-current function for PWM controller will trip
at a peak inductor current (I
The OC trip point varies with MOSFET’s tempera-
ture. To avoid over-current tripping in the normal op-
erating load range, determine the R
from the equation above with:
1. The maximum R
2. The minimum I
3. Determine I
current) /2.
PWM OUT1 Voltage Program
The output voltage of the PWM converter is pro-
grammed to discrete levels between 1.3V to 3.5V.
The VID pins program an internal voltage reference
(DACOUT) through a TTL compatible 5 bit digital to
analog converter. The VID pins can be left open for
a logic 1 input, because they are internally pulled
up to 5V by a 70K
puts during operation is not recommended. All VID
pin combinations resulting in an INHIBIT disable the
IC and the open collector at the PGOOD pin.
OUT2 Voltage Program
The AGP regulator output voltage is internally set to
one of two discrete levels based on the SELECT
pin status. Left SELECT pin open, internal pulled
high, the output voltage is 3.3V. Grounding SE-
LECT pin to GROUND will get the 1.5V output volt-
age.
I
PEAK
I
OCSET
R
DS(ON)
P EAK
R
OCSET
OCSET
DS(ON)
> I
resistor. Changing the VID in-
OUT(MAX)
from the specification table.
at the temperature.
PEAK
SS
) determined by:
+ (inductor ripple
is fully charged.
OCSET
resistor
n
The status of the SELECT pin can not be changed
during operation of the IC without immediatelly
causing a fault condition.
OUT3 and OUT4 Voltage Program
The GTL bus voltage (1.5V, OUT3) and the chip set
and/or cache memorey voltage (1.8V,OUT4) are in-
ternally set for simpe, low cost implementation ba-
se on the FIX pin left open. Grounding FIX pin a l-
lows both output voltages to be set by means of ex-
ternal resistor dividers.
Shutdown
The AIC1574 features a dedicated shetdown pin
(SD). A TTL-compatible logic high signal applied to
this pin shuts down all four outputs and discharge
the soft-start capacitor.
The VID codes resulting in an INHIBIT as shown in
Table 1 also shut down the IC.
APPLICATION GUIDE LINES
Layout Considerations
Any inductance in the switched current path gener-
ates a large voltage spike during the switching i n -
terval. The voltage spikes can degrade efficiency,
VOUT
Adjusting the Output Voltage of OUTPUT 3 and 4
+
V
3.3V
OUT
RGND
ROUT
. 1
265
VSEN
DRV
FIX
V
AIC1574
1
R
R
OUT
GND
AIC1574
14