AIC1574 AIC [Analog Intergrations Corporation], AIC1574 Datasheet - Page 18
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AIC1574
Manufacturer Part Number
AIC1574
Description
5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers
Manufacturer
AIC [Analog Intergrations Corporation]
Datasheet
1.AIC1574.pdf
(20 pages)
perature at high ambient temperature by calcu-
lating the temperature rise according to package
thermal resistance specifications.
The equations above do not model power loss
due to the reverse recovery of the lower
MOSFET’s body diode.
The R
equations even if the type devices is used for
both. This is because the gate drive applied to
the upper MOSFET is different than the lower
MOSFET. Logic level MOSFETs should be se-
lected based on on-resistance considerations,
R
output voltage, allowable power dissipation and
maximum required output current. Power dissi-
pation should be calculated based primarily on
required efficiency or allowable thermal dissipa-
tion.
Rectifier Schottky diode is a clamp that prevent
the loss parasitic MOSFET body diode from
conducting during the dead time between the
turn off of the lower MOSFET and the turn on of
the upper MOSFET. The diode’s rated reverse
P
P
DS(ON)
UPPER
LOWER
DS(ON)
should be chosen base on input and
I
OUT
I
OUT
is different for the two previous
2
2
R
R
VDAC
DS(ON)
DS(ON)
V
ERROR AMP.
D
OSC
1 (
I
OUT
D)
Compensation
Networks
V
VEA
IN
2
PWM COMP.
t
SW
f
breakdown voltage must be greater than twice
the maximum input voltage.
Linear Controller MOSFET Selection
The power dissipated in a linear regulator is :
Select a package and heatsink that maintains
junction temperature below the maximum rating
while operation at the highest expected ambient
temperature.
Linear Output Capacitor
The output capacitors for the linear regulator and
linear controller provide dynamic load current.
The linear controller uses dominant pole com-
pensation integrated in the error amplifier and is
insensitive to output capacitor selection. C
C
sient load regulation.
PWM Feedback Analysis
P
V
OUT3
LINEAR
IN
Q1
Q2
L
O
and C
R
C
ESR
O
I
OUT2
+
OUT4
Modulation
(V
V
should be selected for tran-
OUT
IN2
Gain
V
OUT2
)
AIC1574
OUT2
18
,