ISP1505C NXP [NXP Semiconductors], ISP1505C Datasheet - Page 38
ISP1505C
Manufacturer Part Number
ISP1505C
Description
ULPI Hi-Speed USB host and peripheral transceiver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.ISP1505C.pdf
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NXP Semiconductors
ISP1505A_ISP1505C_3
Product data sheet
9.10.3 Remote wake-up
The ISP1505 supports peripherals that initiate remote wake-up resume. When placed into
USB suspend, the peripheral link remembers at what speed it was originally operating.
Depending on the original speed, the link follows one of the protocols detailed here. In
Figure
The sequence of events related to a host and a peripheral, both with ISP1505, is as
follows:
1. Both the host and the peripheral are assumed to be in low-power mode.
2. The peripheral begins remote wake-up by re-enabling its clock and setting its
3. The peripheral begins driving K on the bus to signal resume. Note that the peripheral
4. The host recognizes the resume, re-enables its clock and sets its SUSPENDM bit.
5. The host takes over resume driving within 1 ms of detecting the remote wake-up.
6. The peripheral stops driving resume.
7. The peripheral sees the host continuing to drive resume.
8. The host stops driving resume and the ISP1505 automatically adds the EOP to the
9. Both the host and the peripheral revert to normal operation by writing 00b to
SUSPENDM bit to 1b.
link must assume that LINESTATE is K (01b) while transmitting because it will not
receive any RXCMDs.
end of resume. The peripheral recognizes the EOP as the end of resume.
OPMODE. If the host or the peripheral was previously in high-speed mode, it must
revert to high-speed before the SE0 of the EOP is completed. This can be achieved
by writing XCVRSELECT[1:0] = 00b and TERMSELECT = 0b after LINESTATE
indicates SE0.
16, timing is not to scale, and not all RXCMD LINESTATE updates are shown.
Rev. 03 — 26 August 2008
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
© NXP B.V. 2008. All rights reserved.
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