ISP1563BM PHILIPS [NXP Semiconductors], ISP1563BM Datasheet - Page 74

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ISP1563BM

Manufacturer Part Number
ISP1563BM
Description
Hi-Speed Universal Serial Bus PCI Host Controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Table 102: USBCMD - USB Command register bit allocation
Address: Value read from func2 of address 10h + 20h
9397 750 14224
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
11.3.4 HCSP-PORTROUTE register
11.4.1 USBCMD register
11.4 Operational registers of Enhanced USB Host Controller
R/W
R/W
31
23
0
0
Table 101: HCCPARAMS - Host Controller Capability Parameters register bit
The HCSP-PORTROUTE (Companion Port Route Description) register is an optional
read-only field that is valid only if PRR (bit 7 in the HCSPARAMS register) is logic 1. Its
address is value read from func2 of address 10h + 0Ch.
This field is a 15-element nibble array, and each 4 bits is one array element. Each array
location corresponds one-to-one with a physical port provided by the Host Controller. For
example, PORTROUTE[0] corresponds to the first PORTSC port, PORTROUTE[1] to the
second PORTSC port, and so on. The value of each element indicates to which of the
companion Host Controllers this port is routed. Only the first N_PORTS elements have
valid information. A value of zero indicates that the port is routed to the lowest numbered
function companion Host Controller. A value of one indicates that the port is routed to the
next lowest numbered function companion Host Controller, and so on.
The USB Command (USBCMD) register indicates the command to be executed by the
serial Host Controller. Writing to this register causes a command to be executed.
Table 102
Bit
3 to 2
1
0
R/W
R/W
30
22
0
0
shows the bit allocation.
description
Symbol
reserved
PFLF
64AC
R/W
R/W
29
21
0
0
…continued
Rev. 01 — 14 July 2005
Description
-
Programmable Frame List Flag: Default = implementation
dependent. If this bit is cleared, the system software must use a
frame list length of 1024 elements with the Host Controller. The
USBCMD register FLS[1:0] (bits 3 and 2) is read-only and should
be cleared. If PFLF is set, the system software can specify and use
a smaller frame list and configure the host through the FLS bit. The
frame list must always be aligned on a 4 kB page boundary to
ensure that the frame list is always physically contiguous.
64-bit Addressing Capability: This field contains the addressing
range capability.
0 — Data structures using 32-bit address memory pointers
1 — Data structures using 64-bit address memory pointers.
R/W
R/W
28
20
0
0
reserved
ITC[7:0]
[1]
R/W
R/W
27
19
0
1
R/W
R/W
26
18
0
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HS USB PCI Host Controller
R/W
R/W
25
17
0
0
ISP1563
R/W
R/W
74 of 107
24
16
0
0

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