MC68HC705SR3 MOTOROLA [Motorola, Inc], MC68HC705SR3 Datasheet - Page 44

• Manufacturer Part Number: MC68HC705SR3
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller Units
• Manufacturer: MOTOROLA [Motorola, Inc]

5
TIF — Timer Interrupt Flag
The I-bit in the CCR must be cleared in order for the timer interrupt to be processed. The interrupt
will vector to the interrupt service routine at the address specified by the contents in $1FF6-$0FF7.
5.2.2.4
Keyboard interrupt function is associated with Port A pins. The keyboard interrupt function is
enabled by setting the keyboard interrupt enable bit KBIE (bit 7 of MCR at $0C) and the individual
enable bits KBE0-KBE7 (bits 0-7 of KBIM at $0B). When the KBEx bit is set, the corresponding
Port A pin will be configured as an input pin, regardless of the DDR setting, and a 20K
resistor is connected to the pin, as shown in Figure 5-4. When a high to low transition is sensed
on the pin, a keyboard interrupt will be generated. An interrupt to the CPU will be generated if the
I-bit in the CCR is cleared.
The keyboard interrupt flag should be cleared in the interrupt service routine (by writing a “1” to
KBIC bit in the MCR at $0C) after the key is debounced. Debouncing will avoid spurious false
triggering.
The keyboard interrupt is negative-edge sensitive only, and the interrupt service routine is
specified by the contents in $1FF4-$1FF5.
MOTOROLA
5-8
DDR0-DDR7
Internal Data bit (0-7), Port A
1 (set)
0 (clear) –
KBIE bit of MCR
KBEx of KBIM
($0C bit 7)
Keyboard Interrupt (KBI)
&
–
Freescale Semiconductor, Inc.
A timer interrupt (timer overflow) has occurred.
A timer interrupt (timer overflow) has not occurred.
For More Information On This Product,
Figure 5-4 Keyboard Interrupt Circuitry
&
RESETS AND INTERRUPTS
Go to: www.freescale.com
&
Pad Logic
20K
V
DD
&
1 input for each of PA0-PA7
(8 input NAND)
PAx
&
MC68HC05SR3
Keyboard
Interrupt
request
pull-up
TPG