LAN91C100FDREVB SMSC [SMSC Corporation], LAN91C100FDREVB Datasheet - Page 49
LAN91C100FDREVB
Manufacturer Part Number
LAN91C100FDREVB
Description
FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN91C100FDREVB.pdf
(68 pages)
- Current page: 49 of 68
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SMSC DS – LAN91C100FD REV. B
SIGNAL
VL BUS
D0-D31
nLDEV
OPEN
IRQn
VCC
GND
INTR0-INTR3
LAN91C100
A1 nVLBUS
nDATACS
nRD nWR
SIGNAL
D0-D31
nLDEV
Table 3 - VL Local Bus Signal Connections
created typically by using nADS delayed by one LCLK.
Typically uses the interrupt lines on the ISA edge connector of VL
bus
32 bit data bus. The bus byte(s) used to access the device are a
function of nBE0-nBE3:
nBE0 nBE1
Not used = tri-state on reads, ignored on writes. Note that nBE2
and nBE3 override the value of A1, which is tied low in this
application.
nLDEV is a totem pole output. nLDEV is active on valid decodes of
A15-A4 and AEN=0.
0
0
1
0
1
1
1
UNUSED PINS
0
0
1
1
0
1
1
Page 49
0
nBE2
1
0
1
1
0
1
0
nBE3
1
0
1
1
1
0
Double word access
NOTES
Low word access
High word access
Byte 0 access
Byte 1 access
Byte 2 access
Byte 3 access
Rev. 05/31/2000
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