LAN9215-MT-E2 SMSC [SMSC Corporation], LAN9215-MT-E2 Datasheet - Page 26

• Manufacturer Part Number: LAN9215-MT-E2
• Description: Highly Efficient 10/100 Ethernet Controller with HP Auto-MDIX
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.5 (07-18-06)
3.5
Reserved
Filter 3 Offset
Setting the Wake-Up Frame Enable bit (WUEN) in the “WUCSR—Wake-up Control and Status
Register”, places the LAN9215 MAC in the wake-up frame detection mode. In this mode, normal data
reception is disabled, and detection logic within the MAC examines receive data for the pre-
programmed wake-up frame patterns. The LAN9215 can be programmed to notify the host of the
wake-up frame detection with the assertion of the host interrupt (IRQ) or assertion of the power
management event signal (PME). Upon detection, the Wake-Up Frame Received bit (WUFR) in the
WUCSR is set. When the host clears the WUEN bit the LAN9215 will resume normal receive operation.
Before putting the MAC into the wake-up frame detection state, the host must provide the detection
logic with a list of sample frames and their corresponding byte masks. This information is written into
the Wake-up Frame Filter register (WUFF). Please refer to
Filter," on page 107
The MAC supports four programmable filters that support many different receive packet patterns. If
remote wake-up mode is enabled, the remote wake-up function receives all frames addressed to the
MAC. It then checks each frame against the enabled filter and recognizes the frame as a remote wake-
up frame if it passes the wakeup frame filter register’s address filtering and CRC value match.
In order to determine which bytes of the frames should be checked by the CRC module, the MAC uses
a programmable byte mask and a programmable pattern offset for each of the four supported filters.
The pattern’s offset defines the location of the first byte that should be checked in the frame. Since
the destination address is checked by the address filtering Function, the pattern offset is always greater
than 12.
The byte mask is a 31-bit field that specifies whether or not each of the 31 contiguous bytes within
the frame, beginning in the pattern offset, should be checked. If bit j in the byte mask is set, the
detection logic checks byte offset +j in the frame. In order to load the Wake-up Frame Filter register,
the host LAN driver software must perform eight writes to the Wake-up Frame Filter register (WUFF).
The Diagram shown in
up frame filter register’s structure.
Note 3.1
Note 3.2
The Filter i Byte Mask defines which incoming frame bytes Filter i will examine to determine whether
or not this is a wake-up frame.
Wake-up Frame Detection
Command
Filter 3
Filter 1 CRC-16
Filter 3 CRC-16
Wake-up frame detection can be performed when the LAN9215 is in the D0 or D1 power
states. In the D0 state, wake-up frame detection is enabled when the WUEN bit is set.
Wake-up frame detection, as well as Magic Packet detection, is always enabled and
cannot be disabled when the device enters the D1 state.
Table 3.2 Wake-Up Frame Filter Register Structure
Reserved
for additional information on this register.
Filter 2 Offset
Table 3.2, "Wake-Up Frame Filter Register Structure"
Command
Table
Filter 2
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
Filter 3 Byte Mask
DATASHEET
3.3, describes the byte mask’s bit fields.
26
Reserved
Filter 1Offset
Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Section 5.4.11, "WUFF—Wake-up Frame
Command
Filter 1
Filter 0 CRC-16
Filter 2 CRC-16
Reserved
below, shows the wake-
Filter 0 Offset
SMSC LAN9215
Command
Filter 0
Datasheet