PEB2080 SIEMENS [Siemens Semiconductor Group], PEB2080 Datasheet - Page 31

• Manufacturer Part Number: PEB2080
• Description: S/T Bus Interface Circuit(SBC)
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

By sending the BUSY bit at 0 to the ISDN Communication Controller in anticipation of the S-bus D-
channel “ready” state, the first valid D bits will emerge from the SBC at exactly the moment an
access is allowed.
D-channel switching (blocked: D = 1, or transparent: D = HDLC) is described by the state diagram
in figure 15a with BUSY bit states “ready” and “busy” as input variables. Figure 15b shows the
status diagram for “ready” and “busy”, with the following variables:
P:
C:
V:
D
Thus state 1 is the state where a D-channel access may be attempted. The transition “1” - “2” occurs
at the first zero of an opening flag (C = 0: zero observed in D-echo channel, and V = 1: a zero has
actually been transmitted). Transition “i - 0” (i = 1,2,3) occurs at the first monitored zero in the echo
channel when the station is idle (“1” - “0”), or if a collision either within an opening flag (“2” - “0”) or
between the opening and closing flags (“3” - “0”) of an HDLC frame is observed. The successful
transmission of a closing flag (“3” - “0” conditioned by C = 6) must be followed by a decrement in
the priority class (D
CCITT I.430.
Semiconductor Group
P
:
priority (8 or 10), set by a C/l channel command
number of consecutive ones appearing in the echo channel
V = 1 if: transmitted D bit = received D-echo bit
V = 0 otherwise
priority decrement for priority class P
(P = 8 or 10).
P
= 1 ). D
P
is reset when 9 or 11 consecutive 1’s are observed (state “1”): cf
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Functional Description