MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 112

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MC68HC908AP64_07

Manufacturer Part Number
MC68HC908AP64_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
System Integration Module (SIM)
7.7.1 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from stop
mode or wait mode.
SBSW — Break Wait Bit
SBSW can be read within the break interrupt routine. The user can modify the return address on the stack
by subtracting 1 from it. The following code is an example.
112
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
This status bit is set when a break interrupt causes an exit from wait mode or stop mode. Clear SBSW
by writing a logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
Note: Writing a logic 0 clears SBSW.
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
Address:
Reset:
Read:
Write:
$FE00
5
6
SBSW,SBSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
Bit 7
R
Figure 7-20. SIM Break Status Register (SBSR)
R
6
MC68HC908AP Family Data Sheet, Rev. 4
R
R
5
;
;
;If RETURNLO is not zero,
;then just decrement low byte.
;Else deal with high byte, too.
;Point to WAIT/STOP opcode.
;Restore H register.
= Reserved
See if wait mode or stop mode was exited by
break.
R
4
R
3
R
2
SBSW
Note
1
0
Freescale Semiconductor
Bit 0
R

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