MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 56

• Manufacturer Part Number: MC68HC908GT16_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Analog-to-Digital Converter (ADC)
3.7.3 ADC Clock Register
The ADC clock register (ADCLK) selects the clock frequency for the ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
ADICLK — ADC Input Clock Select Bit
The ADC requires a clock rate of approximately 1 MHz for correct operation. If the selected clock source
is not fast enough, the ADC will generate incorrect conversions. See
56
ADIV2–ADIV0 form a 3-bit field which selects the divide ratio used by the ADC to generate the internal
ADC clock.
approximately 1 MHz.
ADICLK selects either the bus clock or the oscillator output clock (CGMXCLK) as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK as the ADC clock source.
1 = Internal bus clock
0 = Oscillator output clock (CGMXCLK)
Address:
Table 3-2
Reset:
Read:
Write:
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
$003E
ADIV2
Bit 7
1. X = Don’t care
0
shows the available clock configurations. The ADC clock should be set to
ADIV2
0
0
0
0
1
f
ADIC
Figure 3-5. ADC Clock Register (ADCLK)
= Unimplemented
ADIV1
6
0
Table 3-2. ADC Clock Divide Ratio
=
ADIV1
X
f
0
0
1
1
(1)
CGMXCLK
ADIV0
5
0
ADIV[2:0]
ADIV0
X
or bus frequency
0
1
0
1
(1)
ADICLK
4
0
ADC input clock ÷ 1
ADC input clock ÷ 2
ADC input clock ÷ 4
ADC input clock ÷ 8
ADC input clock ÷ 16
3
0
0
ADC Clock Rate
≅ 1 MHz
20.16 ADC
2
0
0
1
0
0
Characteristics.
Freescale Semiconductor
Bit 0
0
0