AN983 ETC [List of Unclassifed Manufacturers], AN983 Datasheet - Page 48

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AN983

Manufacturer Part Number
AN983
Description
PCI/miniPCI-to-Ethernet LAN Controller
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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Speed selection
Restart Negotiation
Power down
Duplex mode
Collision test
Register 1 (Status):
Rev. 1.8
BIT
15
14
13
12
11
10
9
NAME
100 BASE T4
100BASE-X Full
Duplex
100BASE-X Half
Duplex
10Mbps/s Full
Duplex
10 Mb/s Half
Duplex
100BASE-T2 full
duplex
100BASE-T2 half
When set inhibits actual transmission on the wire.
bit will be determined by a power-up configuration pin in this case. Otherwise it
defaults to 1.
Auto-neg enable Defaults to pin programmed value. When cleared allows forcing
of speed and duplex settings. When set (after being cleared) causes re-start of
autoneg process. Pin programming at power-up allows it to come up disabled and
for software to write the desired capability before allowing the first negotiation to
commence.
other specific modules.
Isolate
ignores transmit signals.
half duplex (bit = 0).
Forces speed of Phy only when autonegotiation is disabled. The default state of this
only has effect when autonegotiating. Restarts state machine.
Has no effect in this device. Test mode power down modes may be implemented in
When bit12 is cleared (i.e. autoneg disabled), this bit forces full duplex (bit = 1) or
Always 0 because collision signal is not implemented.
DESCRIPTION
Not supported
1 = PHY is 100BASE-X full duplex
capable
0 = PHY is not 100BASE-X full duplex
capable
1 = PHY is 100BASE-X half duplex capable
0 = PHY is not 100BASE-X half duplex
capable
1 = PHY is 10Mbps/s Full duplex capable
0 = PHY is not 10Mbps/s Full duplex
capable
1 = PHY is 10Mbps/s Half duplex capable
0 = PHY is not 10Mbps/s Half duplex
capable
Not supported
Not supported
AN983B
www.admtek.com.tw
ADMtek Inc.
Puts RMII receive signals into high impedance state and
PCI/miPCI Fast Ethernet Controller with integrated PHY
RO
RO
Read/Write
RO
RO
RO
RO
RO
Default
0
1
1
1
1
0
0
48

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