AT89C5122 ATMEL [ATMEL Corporation], AT89C5122 Datasheet - Page 123

• Manufacturer Part Number: AT89C5122
• Description: MICROCONTROLLER WITH USB AND SMART CARD READER INTERFACES
• Manufacturer: ATMEL [ATMEL Corporation]

4202D–SCR–06/05
Table 73. USB Endpoint FIFO Reset Register - UEPRST (S:D5h)
Reset Value = 0000 0000b
Number
Bit
7
6
5
4
3
2
1
0
7
-
Mnemonic Description
EP6RST
EP5RST
EP4RST
EP3RST
EP2RST
EP1RST
EP0RST
EP6RST
Bit
-
6
Reserved
The value read from these bits is always 0. Do not change this bit.
Endpoint 6 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 5 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 4 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 3 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 2 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 1 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
Endpoint 0 FIFO Reset
Set this bit and reset the endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Then, clear this bit to complete the reset operation and start using the FIFO.
EP5RST
5
EP4RST
4
EP3RST
3
EP2RST
2
EP1RST
1
EP0RST
0
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