AT89C5122 ATMEL [ATMEL Corporation], AT89C5122 Datasheet - Page 43
AT89C5122
Manufacturer Part Number
AT89C5122
Description
MICROCONTROLLER WITH USB AND SMART CARD READER INTERFACES
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C5122.pdf
(213 pages)
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Clock Tree Architecture
4202D–SCR–06/05
Figure 19. PLL Programming Flow
The clock controller outputs several different clocks as shown in Figure 20:
•
•
•
•
•
These clocks are enabled or not depending on the power reduction mode as detailed in
Section “Power Management”, page 180.
These clocks are generated using four presacalers defined in the table below:
Prescaler
PR1
PR2
PR3
PR4
a clock for the CPU core
a clock for the peripherals which is used to generate the timers, watchdog, SPI,
UART, and ports sampling clocks. This divided clock will be used to generate the
alternate card clock.
a clock for the USB
a clock for the SCIB controller
a clock for the DC/DC converter
Configure Dividers
Programming
PLL Locked?
N3:0=
R3:0=
Enable PLL
PLOCK= 1?
PLLEN= 1
PLL
Register
CKRL
SCICLK
SCSR
DCCKPS
xxxxb
xxxxb
Reload Factor
CKRL[0:3]
SCICLK[0:5]
ALTKPS[0:1]
DCCKPS[3:0]
Function
CPU & Peripheral clocks
Smart card
Alternate card
DC/DC
43
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