SAB-C167SR-LM SIEMENS [Siemens Semiconductor Group], SAB-C167SR-LM Datasheet - Page 10

• Manufacturer Part Number: SAB-C167SR-LM
• Description: 16-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Pin Definitions and Functions
Symbol
P3.0 -
P3.13,
P3.15
P4.0 -
P4.7
RD
Semiconductor Group
Pin
Number
65 - 70,
73 - 80,
81
65
66
67
68
69
70
73
74
75
76
77
78
79
80
81
85 - 92
85
...
89
...
92
95
Input (I)
Output (O)
I/O
I/O
I/O
I
O
I
O
I
I
I
I
I/O
I/O
O
I/O
O
O
I/O
O
I/O
O
...
O
...
O
O
(cont’d)
Function
Port 3 is a 15-bit (P3.14 is missing) bidirectional I/O port. It is
bit-wise programmable for input or output via direction bits.
For a pin configured as input, the output driver is put into high-
impedance state. Port 3 outputs can be configured as push/
pull or open drain drivers. The input threshold of Port 3 is
selectable (TTL or special).
The following Port 3 pins also serve for alternate functions:
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
P3.15
Port 4 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state.
In case of an external bus configuration, Port 4 can be used to
output the segment address lines:
P4.0
...
P4.4
..
P4.7
External Memory Read Strobe. RD is activated for every
external instruction or data read access.
T0IN
T6OUT
CAPIN
T3OUT
T3EUD
T4IN
T3IN
T2IN
MRST
MTSR
T D0
R D0
BHE
WRH
SCLK
CLKOUT System Clock Output (=CPU Clock)
A16
...
A20
:
A23
7
CAPCOM Timer T0 Count Input
GPT2 Timer T6 Toggle Latch Output
GPT2 Register CAPREL Capture Input
GPT1 Timer T3 Toggle Latch Output
GPT1 Timer T3 Ext.Up/Down Ctrl.Input
GPT1 Timer T4 Input for
Count/Gate/Reload/Capture
GPT1 Timer T3 Count/Gate Input
GPT1 Timer T2 Input for
Count/Gate/Reload/Capture
SSC Master-Rec./Slave-Transmit I/O
SSC Master-Transmit/Slave-Rec. O/I
ASC0 Clock/Data Output (Asyn./Syn.)
ASC0 Data Input (Asyn.) or I/O (Syn.)
Ext. Memory High Byte Enable Signal,
Ext. Memory High Byte Write Strobe
SSC Master Clock Outp./Slave Cl. Inp.
Least Significant Segment Addr. Line
...
Least Significant Segment Addr. Line
:
Most Significant Segment Addr. Line
C167SR