SAF-C515-L24M SIEMENS [Siemens Semiconductor Group], SAF-C515-L24M Datasheet - Page 38

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SAF-C515-L24M

Manufacturer Part Number
SAF-C515-L24M
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Fail Save Mechanisms
As a means of graceful recovery from software or hardware upset a watchdog timer is provided in
the C515. lf the software fails to clear the watchdog timer at least every 65532 s (at 12 MHz clock
rate), an internal hardware reset will be initiated. The software can be designed such that the
watchdog times out if the program does not progress properly. The watchdog will also time out if the
software error was due to hardware-related problems. This prevents the controller from
malfunctioning for longer than 65 ms if a 12-MHz oscillator is used. Figure 17 shows the block
diagram of the watchdog timer unit.
Figure 17
Block Diagram of the Watchdog Timer
The watchdog timer can be started by software (bit SWDT) but it cannot be stopped during active
mode of the C515. lf the software fails to clear the watchdog in time, an internally generated
watchdog reset is entered at the counter state FFFC H and lasts four instruction cycles. This internal
reset differs from an external reset only to the extent that the watchdog timer is not disabled. Bit
WDTS (was set by starting WDT) allows the software to examine from which source the reset was
initiated. lf it is set, the reset was caused by a watchdog timer overflow.
Semiconductor Group
f
WDT Reset if WDT count is between
External HW Reset
OSC
-
-
-
WDTS
SWDT
WDT
-
-
-
÷ 12
Control Logic
-
-
-
-
-
-
-
-
-
38
FFFC H
-
-
-
IP0 ( A9 H )
-
FFFF
-
-
-
H
IEN0
IEN1
16-Bit Watchdog Timer
(
( B8 H
A8
H
)
)
Reset
MCB03210
1997-08-01
C515

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