SAF-XC886LM-8FFI INFINEON [Infineon Technologies AG], SAF-XC886LM-8FFI Datasheet - Page 65
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SAF-XC886LM-8FFI
Manufacturer Part Number
SAF-XC886LM-8FFI
Description
8-Bit Single-Chip Microcontroller
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.SAF-XC886LM-8FFI.pdf
(119 pages)
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3.7
The XC886/888 has five types of reset: power-on reset, hardware reset, watchdog timer
reset, power-down wake-up reset, and brownout reset.
When the XC886/888 is first powered up, the status of certain pins (see
be defined to ensure proper start operation of the device. At the end of a reset sequence,
the sampled values are latched to select the desired boot option, which cannot be
modified until the next power-on reset or hardware reset. This guarantees stable
conditions during the normal operation of the device.
In order to power up the system properly, the external reset pin RESET must be asserted
until V
capacitor at RESET pin. This capacitor value must be selected so that V
0.4 V, but not before V
A typical application example is shown in
= 100 mA, the V
capacitor connected to RESET pin is 100 nF.
Typically, the time taken for V
reaches 2.3V. Hence, based on the condition that 10% to 90% V
than 500 µs, the RESET pin should be held low for 500 µs typically. See
Figure 23
Data Sheet
Prelimary
DDC
reaches 0.9*V
Reset Control
Reset Circuitry
Vin
DDP
100nF
typ.
capacitor value is 10 µF. V
DDC
DDC
VR
reaches 0.9* V
. The delay of external reset can be realized by an external
DDC
e.g. 100mA
to reach 0.9*V
RESET
VSSP
3 - 5V /
e.g. 10uF
30k
Figure
DDC.
61
VDDP
23. For a voltage regulator with IDD
DDC
DDC
capacitor value is 220 nF. The
VDDC
is less than 50 µs once V
EVR
220nF
Functional Description
DDP
XC886/888
VSSC
XC886/888CLM
(slew rate) is less
Table
RESET
Figure
V0.1, 2006-02
23) must
reaches
24.
DDP
max
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