DS89C420-ENL MAXIM [Maxim Integrated Products], DS89C420-ENL Datasheet - Page 24

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DS89C420-ENL

Manufacturer Part Number
DS89C420-ENL
Description
Ultra-High-Speed Microcontroller
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Figure 5. NON-PAGE MODE, EXTERNAL DATA-MEMORY ACCESS
(STRETCH = 1, CD1:CD2 = 10)
PAGE MODE, EXTERNAL MEMORY CYCLE
Page mode retains the basic circuitry requirement for original 8051 external memory interface, but alters
the configuration of P0 and P2 for the purposes of address output and data I/O during external memory
cycles. Additionally, the functions of ALE and
Page mode i s enabled by setting the PAGEE (ACON.7) bit to a logic 1. Clearing the PAGEE bit to a
logic 0 disables the page mode and the external bus structure defaults to the original 8051 expanded bus
configuration (non-page mode). The DS89C420 supports page mode in two external bus structures. The
logic value of the page mode select bits in the ACON register determines the external bus structure and
the basic memory cycle in the number of system clocks. Table 7 summarizes this option. The first three
selections use the same bus structure but with a different memory cycle time. Setting the select bits to 11b
selects another bus structure. Write access to the ACON register requires a timed access.
RD WR
XTAL1
Port 0
Port 2
PSEN
ALE
MOVX
Instruction
Fetch
A
A
MOVX
1st Machine Cycle
A
INST
MOVX Instruction
2nd Machine Cycle
PSEN
24 of 58
A
are altered to support this mode of operation.
A
Memory Access
Stretch = 1
DATA
3rd Machine Cycle
DS89C420

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