ISL8023 INTERSIL [Intersil Corporation], ISL8023 Datasheet

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ISL8023

Manufacturer Part Number
ISL8023
Description
3A/4A Low Quiescent Current High Efficiency Synchronous Buck Regulator
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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3A/4A Low Quiescent Current High Efficiency
Synchronous Buck Regulator
ISL8023, ISL8024
The ISL8023, ISL8024 is a high efficiency, monolithic,
synchronous step-down DC/DC converter that can deliver up to
3A/4A continuous output current from a 2.7V to 5.5V input
supply. It uses current control architecture to deliver very low
duty cycle operation at high frequency with fast transient
response and excellent loop stability.
The ISL8023, ISL8024 integrates a pair of low ON-resistance
P-Channel and N-Channel internal MOSFETs to maximize
efficiency and minimize external component count. The 100%
duty-cycle operation allows less than 200mV dropout voltage
at 4A output current. The operational frequency, pulse-width
modulation (PWM), is adjustable from 500kHz to 4MHz.
Connecting FS pin high sets the default frequency to 1MHz
switching frequency allows the use of small external
components. The ISL8023, ISL8024 can be configured for
discontinuous or forced continuous operation at light load.
Forced continuous operation reduces noise and RF
interference while discontinuous mode provides high
efficiency by reducing switching losses at light loads.
Fault protection is provided by internal hiccup mode current
limiting during short circuit and overcurrent conditions, an
output over voltage comparator and over-temperature monitor
circuit. A power good output voltage monitor indicates when
the output is in regulation.
The ISL8023, ISL8024 offers a 1ms Power-Good (PG) timer at
power-up. When in shutdown, ISL8023, ISL8024 discharges
the output capacitor. Other features include internal fixed or
adjustable soft-start, internal/external compensation, and
thermal shutdown.
The ISL8023, ISL8024 is offered in a space saving in a 16 Ld
3x3 QFN lead free package with exposed pad lead frames for
low thermal with 1mm maximum height. The complete
converter occupies less than 0.22 in
Various fixed output voltage are available upon request. See
ordering information for more detail.
December 22, 2011
FN7812.0
1
2
area.
100
FIGURE 1. EFFICIENCY T = +25°C V
90
80
70
60
50
40
0.0
3.3V
0.5
3.3V
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
OUT
1.0
PWM
1-888-INTERSIL or 1-888-468-3774
PFM
1.5
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
I
OUT
2.0
Features
• High Efficiency Synchronous Buck Regulator with up to 95%
• 0.8% Reference Accuracy Over-Temperature/Load/Line
• Start-up with Pre-Biased Output
• Internal Soft-Start - 1ms or Adjustable
• Soft-Stop Output Discharge During Disabled
• Adjustable Frequency from 500kHz to 4MHz - default at
• External Synchronization up to 4MHz
• Negative OC protection
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
• Li-ion Battery Powered Devices
Applications
• DC/DC POL Modules
• µC/uP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
• Li-ion Battery Powered Devices
Related Literature
See AN1660, “3A/4A Low Quiescent Current High Efficiency
Synchronous Buck Regulator”
(A)
Efficiency
1MHz (8023/24), 2MHz (8023A/24A)
2.5
All other trademarks mentioned are the property of their respective owners.
3.0
IN
= 5V
3.5
|
Copyright Intersil Americas Inc. 2011. All Rights Reserved
4.0

Related parts for ISL8023

ISL8023 Summary of contents

Page 1

... Other features include internal fixed or adjustable soft-start, internal/external compensation, and thermal shutdown. The ISL8023, ISL8024 is offered in a space saving 3x3 QFN lead free package with exposed pad lead frames for low thermal with 1mm maximum height. The complete 2 converter occupies less than 0 ...

Page 2

... SYNC COMP SGND 11, 12 PGND 13, 14, 15 PHASE Exposed Pad 2 ISL8023, ISL8024 ISL8023, ISL8024 (16 LD TQFN) TOP VIEW VIN 1 2 VDD 3 PG SYNC Input supply voltage. Connect two 22µF ceramic capacitors to power ground. ...

Page 3

... OUTPUT VOLTAGE (V) ADJUSTABLE ADJUSTABLE ADJUSTABLE ADJUSTABLE TB347 for details on reel specifications. ISL8023, VIN PHASE VDD EN R1 PGND 100k PG ISL8023, ISL8024 SGND SYNC VFB COMP VIN FS SS FIGURE 2. TYPICAL APPLICATION DIAGRAM TABLE 1. COMPONENT SELECTION TABLE 1.2V 1.5V 1.8V 22µF 22µF 22µ 22µ 22µF 4 ...

Page 4

... ISL8023, ISL8024 COMP 55pF SS SOFT Soft START SHUTDOWN 100k + EN VREF BANDGAP + EAMP - 3pF + VFB SLOPE Slope 6k COMP 0. 0.85*VREF + UV PG 1ms DELAY SGND - SCP 0.5V + FIGURE 3. FUNCTIONAL BLOCK DIAGRAM 4 FS SYNC SHUTDOWN VDD OSCILLATOR + COMP - PWM/PFM LOGIC CONTROLLER PROTECTION HS DRIVER + + CSA - + OCP - ISET ...

Page 5

... Undervoltage Lockout Threshold IN Quiescent Supply Current Shut Down Supply Current OUTPUT REGULATION Reference Voltage - ISL8023IRZ, ISL8024IRZ VFB Bias Current - ISL8023IRZ, ISL8024IRZ Line Regulation Soft-Start Ramp Time Cycle Soft-Start Charging Current OVERCURRENT PROTECTION Current Limit Blanking Time Overcurrent and Auto Restart Period ...

Page 6

... EN Logic Input Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design 6 ISL8023, ISL8024 Unless otherwise noted, all parameter limits are established over the recommended operating SYMBOL TEST CONDITIONS FS = VIN FS with Resistor ...

Page 7

... OUT FIGURE 6. EFFICIENCY vs LOAD (1MHz 5V 1.08 0.90 0.72 3.3V PWM MODE 0.54 IN 0.36 0.18 0 0.0 0.5 1.0 1.5 2.0 I (A) OUT FIGURE 8. POWER DISSIPATION vs LOAD (1MHz ISL8023, ISL8024 Unless otherwise noted, operating conditions are 22µ 4A). 2 OUT 100 90 80 OUT 2.5V OUT 2.5 3.0 3.5 4.0 0.0 PWM) FIGURE 5. EFFICIENCY vs LOAD (1MHz 3.3 V ...

Page 8

... LOAD 1.805 1.800 2A LOAD 1.795 1.790 4A LOAD 1.785 2.0 2.5 3.0 3.5 4.0 V (V) IN FIGURE 14. OUTPUT VOLTAGE REGULATION vs V (PWM V = 1.8 ) OUT 8 ISL8023, ISL8024 Unless otherwise noted, operating conditions are 22µ 4A). (Continued) 2 OUT 1.830 1.824 1.818 1.812 1.806 1.800 1.794 2.5 3.0 3.5 4.0 0.0 FIGURE 11 1.5V) OUT 3 ...

Page 9

... FIGURE 18. STEADY STATE OPERATION WITH FULL LOAD V RIPPLE 50mV/Div OUT I 2A/Div L FIGURE 20. LOAD TRANSIENT (PFM) 9 ISL8023, ISL8024 Unless otherwise noted, operating conditions are 22µ 4A). (Continued) 2 OUT FIGURE 17. STEADY STATE OPERATION AT NO LOAD (PFM) FIGURE 21. SOFT-START WITH NO LOAD (PWM) = +25°C, V ...

Page 10

... PHASE 5V/Div V RIPPLE 20mV/Div OUT I 0.5A/Div L SYNC 5V/Div FIGURE 26. STEADY STATE OPERATION AT NO LOAD WITH FREQUENCY = 2MHz 10 ISL8023, ISL8024 Unless otherwise noted, operating conditions are 22µ 4A). (Continued) 2 OUT EN 2V/Div V 1V/Div OUT FIGURE 23. SOFT-START WITH PRE-BIASED 1V EN 2V/Div ...

Page 11

... PHASE 2V/Div V RIPPLE 20mV/Div OUT I 0.5A/Div L FIGURE 32. STEADY STATE OPERATION AT NO LOAD (PWM) 11 ISL8023, ISL8024 Unless otherwise noted, operating conditions are 22µ 4A). (Continued) 2 OUT FIGURE 29. STEADY STATE OPERATION AT FULL LOAD (PWM) WITH , L = 1.0µ 22µ 22µF, I ...

Page 12

... SYNC = V A VIN IN PHASE 2V/Div I 2A/Div L V RIPPLE 20mV/Div OUT FIGURE 34. STEADY STATE OPERATION WITH FULL LOAD FIGURE 36. SOFT-START AT NO LOAD (PFM) 12 ISL8023, ISL8024 , L = 1.0µ 22µ 22µ 2V/Div V 1V/Div OUT I 1A/Div L PG 5V/Div EN 2V/Div ...

Page 13

... FIGURE 39. PWM OPERATION WAVEFORMS SKIP Mode Pulling the SYNC pin LO (<0.4V) forces the converter into PFM mode. The ISL8023, ISL8024 enters a pulse-skipping mode at light load to minimize the switching loss by reducing the switching frequency. Figure 40 illustrates the skip-mode operation. A zero-cross sensing circuit shown in Figure 4 on page 7monitors the N-FET current for zero crossing ...

Page 14

... VFB. When VFB drops 15% below or raises 0.6V above the nominal regulation voltage, the ISL8023, ISL8024 pulls PG low. Any fault condition forces PG low until the fault condition is cleared by attempts to soft-start. For logic level output voltages, connect an external pull-up resistor and VIN. A 100kΩ ...

Page 15

... L f The inductor’s saturation current rating needs least larger than the peak current. The ISL8023, ISL8024 protects the as shown by SS typical peak current 6A. The saturation current needs be over 7A for maximum output current application. (EQ. 2) ISL8023, ISL8024 uses internal compensation network and the output capacitor value is dependent on the output voltage ...

Page 16

... Loop Compensation Design When there is an external resistor connected from FS to SGND, COMP pin is active for external loop compensation. The ISL8023, ISL8024 uses constant frequency peak current mode control architecture to achieve fast loop transient response. An accurate current sensing pilot device in parallel with the upper MOSFET is used for peak current control signal and overcurrent protection ...

Page 17

... Equation 15. 2π ------------------------------- - = 6 ⋅ ISL8023, ISL8024 where the sum of the trans-conductance, g voltage error amplifier in each phase. Compensator capacitor C6 is then given by Equation 16. C ---------------- - Example 22µF/3mΩ 1µ 160µ 0.6V, S ...

Page 18

... PCB Layout Recommendation The PCB layout is a very important converter design step to make sure the designed converter works well. For ISL8023, ISL8024, the power loop is composed of the output inductor L’s, the output capacitor C , the PHASE’s pins, and the PGND pin ...

Page 19

... Package Outline Drawing L16.3x3D 16 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 3/10 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW (2.80 TYP) ( 1.60) TYPICAL RECOMMENDED LAND PATTERN 19 ISL8023, ISL8024 4X 1.50 A 12X 0. 16X 0.40±0.10 BOTTOM VIEW 0.75 ±0.05 SIDE VIEW (12X 0.50) (16X 0.23) C (16X 0.60) DETAIL "X" ...

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