AD8197B-EVALZ AD [Analog Devices], AD8197B-EVALZ Datasheet - Page 21

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AD8197B-EVALZ

Manufacturer Part Number
AD8197B-EVALZ
Description
4:1 HDMI/DVI Switch with Equalization
Manufacturer
AD [Analog Devices]
Datasheet
PARALLEL INTERFACE CONFIGURATION REGISTERS
The parallel interface configuration registers can be directly set using the PP_EN, PP_CH[1:0], PP_EQ, PP_PRE[1:0], PP_OTO, and
PP_OCL pins. This interface is accessible only after the part is reset and before any registers are accessed using the serial control interface.
Because most systems use serial control for the input termination resistors, the parallel control interface is limited to controlling the
AD8197B status after reset and before serial logic control. The state of each pin is set by tying it to 3.3 V (Logic 1) or 0 V (Logic 0).
Table 18. Parallel Interface Register Map
Name
High Speed Device
Modes
Auxiliary Device
Modes
Receiver Settings
Input Termination
Resistor Control.1
Input Termination
Resistor Control 2
Receive Equalizer 1
Receive Equalizer 2
Transmitter Settings
Bit 7
0
0
PP_EQ
PP_EQ
Bit 6
High speed
switch enable
PP_EN
Auxiliary switch
enable
1
0
0
PP_EQ
PP_EQ
Source C and Source D input termination select (No parallel control termination, always open)
Source A and Source B input termination select (No parallel control termination, always open)
Bit 5
0
0
0
0
PP_EQ
PP_EQ
Source A and Source B input equalization level select
Source C and Source D input equalization level select
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Bit 4
0
0
0
0
PP_EQ
PP_EQ
Bit 3
0
0
0
0
PP_EQ
PP_EQ
PP_PE[1]
Output pre-emphasis
level select
Bit 2
0
0
0
0
PP_EQ
PP_EQ
PP_PE[0]
PP_OTO
Bit 1
PP_CH[1]
PP_CH[1]
0
0
PP_EQ
PP_EQ
Output termination
on/off select
Auxiliary switch source select
High speed source select
Bit 0
PP_CH[0]
PP_CH[0]
Input term.
select
(terminations
always open in
parallel control
mode)
1
0
0
PP_EQ
PP_EQ
Output current
level select
PP_OCL
AD8197B

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