STA015B STMICROELECTRONICS [STMicroelectronics], STA015B Datasheet - Page 36

• Manufacturer Part Number: STA015B
• Description: MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA015-STA015B-STA015T
5.4.2. Bitstream input interface (SDI, SCKR, BIT_EN) SCL_POL = 0
5.4.2. Bitstream input interface (SDI, SCKR, BIT_EN) SCL_POL = 1
tsdi_setup_min= 2ns
tsdi_hold_min = 3ns
tsckr_min_hi = 10ns
tsckr_min_low = 10ns
tsckr_min_lperiod = 50ns
t_biten (min) = 2ns
5.4.3. SRC_INT
This is an asynchronous input used in ”broadcast’ mode.
SRC_INT is active low
t_src_low min duration is 50ns (1DSP clock period)
t_src_high min duration is 50ns (1DSP clock period)
5.4.4. XTI,XTO and CLK_OUT timings
txto = 1.40 + pad_timing (Cload_XTO) ns
tclk_out = 4 + pad_timing (Cload_CLK_OUT) ns
Note: In ”multimedia” mode, the CLK_OUT pad is DATA_REQ. In that case, no timing is given between th e XTI input and this pad.
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SRC_INT
XTI (INPUT)
CLK_OUT
XTO
SCKR
SCKR
BIT_EN
BIT_EN
SDI
SDI
t
clk_out
IGNORED
t
xto
IGNORED
t
_src_hi
t
t
sckr_min_period
sckr_min_period
t
IGNORED
hi
t
sdi_setup
t
t
_biten
_biten
VALID
t
t
sckr_min_high
sckr_min_high
t
t
sdi_setup
sdi_hold
t
_src_low
t
VALID
lo
t
t
sckr_min_low
sckr_min_low
t
t
t
_biten
_biten
sdi_hold
IGNORED
IGNORED
D98AU971A
D99AU1038
D98AU972
SCLK_POL=0
SCLK_POL=4
D98AU973