HSDL-3220-001 HP [Agilent(Hewlett-Packard)], HSDL-3220-001 Datasheet - Page 3

• Manufacturer Part Number: HSDL-3220-001
• Manufacturer: HP [Agilent(Hewlett-Packard)]

3
Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
Figure 3. Bandwidth selection timing at SIR/MIR mode.
Setting the transceiver to SIR/MIR
Mode (9.6 kbit/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
2. TXD input should remain at
3. After waiting for t
Transceiver I/O Truth Table
TXD
High
Low
Low
Don’t Care
Notes:
12. In-band IrDA signals and data rates ≤ 4.0 Mbit/s
13. RXD logic low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
SD/MODE
HIGH
logic LOW
SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
TXD
50%
Light Input to Receiver
Don’t Care
High
Low
Don’t Care
S
≥ 25 ns, set
t
S
Inputs
50%
t
H
4. Ensure that TXD input re-
5. SD input pulse width for mode
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
mains low for t
receiver is now in SIR/MIR
mode
selection should be > 50 ns.
HIGH
50%
V
V
IH
IL
SD
Low
Low
High
Low
V
IL
H
Figure 4. Bandwidth selection timing at FIR mode.
SD/MODE
≥ 100 ns, the
TXD
LED
On
Off
Off
Off
Outputs
50%
2. After SD/Mode input remains
3. Then set SD/Mode to logic
4. After waiting for t
5. SD input pulse width mode
RXD
Low
High
High
Not Valid
HIGH at > 25 ns, set TXD input
to logic HIGH, wait t
(from 50% of TXD rising edge
till 50% of SD falling edge)
LOW, the HIGH to LOW
negative edge transition will
determine the receiver band-
width
set the TXD input to logic LOW
selection should be > 50 ns.
t
S
50%
t
H
H
Note
12,13
50%
≥ 100 ns,
S
V
V
IH
IL
≥ 25 ns
V
V
IH
IL