TDA5252G2 INFINEON [Infineon Technologies AG], TDA5252G2 Datasheet - Page 31

• Manufacturer Part Number: TDA5252G2
• Description: ASK/FSK 915MHz Wireless Transceiver
• Manufacturer: INFINEON [Infineon Technologies AG]

Note: The time delay between start of ON time and the 15µs LOW impulse is 2.6ms + 3 period of
data rate.
If ADC & Data Detect Logic are in continuous mode the 15µs LOW impulse is applied at PwdDD
after each data valid decision.
In self polling mode if D9=0 (Register 00h) and when PwdDD pin level is HIGH the CLK output is
on during ON time and off during OFF time. If D9=1, the CLK output is always on.
TIMER MODE: Only the internal Timer (determined by the ON_TIME and OFF_TIME registers) is
active to support an external logic with periodical Interrupts. After ON_TIME + OFF_TIME a 15µs
LOW impulse is applied at the PwdDD pin (Pin 27).
Figure 2-11
2.4.17
Data signals generate a typical spectrum and this can be used to determine if valid data is on air.
Figure 2-12
The “data valid” criterion is generated from the result of RSSI-TH3 comparison and t
TH1 and TH2 result as shown below. In case of Manchester coding the 0,5*TH1 and 0,5*TH2 gives
improved performance.
The use of permanent data valid recognition makes it absolutely necessary to set the RSSI-ADC
and the Window counter into continuous mode (Register 00H, Bit D5 = D6 = 1).
Data Sheet
TIMER MODE
PwdDD pin in
Data Valid Detection, Data Pin
Timing for Timer Mode
Frequency and RSSI Window
Action
RSSI
Amplitude
15µs
Register 04H
ON_TIME
f
Register 05H
OFF_TIME
Frequency & RSSI Window
31
DATA on air
no DATA on air
15µs
Register 04H
ON_TIME
Frequency
Functional Description
t
t
TDA5252 G2
Version 1.1
timing_timermode.wmf
GATE
data_rate_detect.wmf
2007-02-26
between